IP Library Granted Patent US 6,713,884
Granted Patent Utility
US 6,713,884 · Confirmation No. 8119

METHOD OF FORMING AN ALIGNMENT MARK STRUCTURE USING STANDARD PROCESS STEPS FOR FORMING VERTICAL GATE TRANSISTORS

Inventor: Rolf Weis
⬇ PDF
Code Description Pages PDF
2004-01-16 IFEE Issue Fee Payment (PTO-85B) 2 View
2001-12-20 TRNA Transmittal of New Application 3 View
2001-12-20 SPEC Specification 29 View
2001-12-20 CLM Claims 9 View
2001-12-20 ABST Abstract 1 View
2001-12-20 DRW Drawings-only black and white line drawings 15 View
2001-12-20 OATH Oath or Declaration filed 3 View
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Quick Facts
Patent No.
US 6,713,884
App. No.
10/026,347
Filed
2001-12-20
Granted
2004-03-30
Pub. No.
US20030119274A1
Art Unit
2813
PTA
0 days