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App. No. 10/762,973 · Confirmation No. 6352

METHOD OF FORMING AN ALIGNMENT MARK STRUCTURE USING STANDARD PROCESS STEPS FOR FORMING VERTICAL GATE TRANSISTORS

Inventor: Rolf Weis
Patent Expired Due to NonPayment of Maintenance Fees Under 37 CFR 1.362 View Patent ↗ View Publication ↗
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2004-07-26 1449 List of References cited by applicant and considered by examiner 1 View
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2004-07-26 IIFW Issue Information including classification, examiner, name, claim, renumbering, etc. 1 View
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2004-01-22 SPEC Specification 28 View
2004-01-22 CLM Claims 9 View
2004-01-22 ABST Abstract 1 View
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2004-01-22 OATH Oath or Declaration filed 3 View
2004-01-22 A.PE Preliminary Amendment 1 View
2004-01-22 SPEC Specification 1 View
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2004-01-22 REM Applicant Arguments/Remarks Made in an Amendment 1 View
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Quick Facts
App. No.
10/762,973
Filed
2004-01-22
Granted
2004-11-30
Pub. No.
US20040152270A1
Art Unit
2813
PTA
0 days