IP Library Granted Patent US 6,566,202
Granted Patent Utility
US 6,566,202 · Confirmation No. 1789

INTEGRATED CIRCUIT HAVING AT LEAST TWO VERTICAL MOS TRANSISTORS AND METHOD FOR MANUFACTURING SAME

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Code Description Pages PDF
2015-08-06 OATH Oath or Declaration filed 10 View
2002-02-22 TRNA Transmittal of New Application 3 View
2002-02-22 A.PE Preliminary Amendment 2 View
2002-02-22 SPEC Specification 10 View
2002-02-22 CLM Claims 4 View
2002-02-22 ABST Abstract 1 View
2002-02-22 DRW Drawings-only black and white line drawings 3 View
2002-02-22 OATH Oath or Declaration filed 3 View
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Quick Facts
Patent No.
US 6,566,202
App. No.
10/081,902
Filed
2002-02-22
Granted
2003-05-20
Pub. No.
US20020094628A1
Art Unit
2812
PTA
0 days