IP Library Granted Patent US 7,234,047
Granted Patent B1
US 7,234,047 · App. 10/133,812 · Granted Jun 19, 2007

Method for managing memory space during system initialization

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Quick Facts
Patent No.
US 7,234,047
App. No.
10/133,812
Granted
Jun 19, 2007
Kind
B1
Abstract

A method for managing use of a fixed memory space of a computer system is provided. The computer system interfaces with controllers for managing operation of devices that operate with the computer system. The method includes determining whether sufficient memory is allocated in the fixed memory space for initializing code for the controllers, and jumping to swappable portion of the fixed memory space. The method also includes executing code in the swappable portion of the fixed memory space. The method further includes loading additional code needed to initialize the controllers from an external memory chip to the fixed memory space where the additional code is executed to complete initialization of the controllers of the computer system.

Claims (20)

1. A method to optimize memory resources, comprising:

loading an initialization code and a runtime code into an Option ROM memory space;

determining availability of the memory resources of extended memory, conventional memory, and the Option ROM memory space;

when the memory resources of the extended memory, the conventional memory, and the Option ROM memory space are not available,

running a portion of the initialization code located in a swappable space of the Option ROM memory space;

copying a configuration code over the portion of the initialization code that has been run in the swappable space of the Option ROM memory space; and

running the configuration code in the swappable space of the Option ROM memory space.

2. The method to optimize memory resources as recited in claim 1 , wherein running the portion of the initialization code includes,

jumping to the swappable space of the Option ROM memory space containing the portion of the initialization code, and

processing the portion of the initialization code in the swappable space.

3. The method to optimize memory resources as recited in claim 1 , wherein copying the configuration code includes,

determining whether an interrupt has been initiated to run the configuration code;

when the interrupt has been initiated,

loading the configuration code into the swappable space where the portion of the initialization code has just been run.

4. The method to optimize memory resources as recited in claim 1 , wherein running a portion of the initialization code includes,

determining whether an interrupt has been initiated to run the configuration code.

5. The method to optimize memory resources as recited in claim 1 , wherein the copying of the configuration code is from a flash memory device to the Option ROM memory space.

6. The method to optimize memory resources as recited in claim 2 , wherein running a portion of the initialization code includes,

returning to a memory space where the jumping was initiated after the portion of the initialization code is run.

7. The method to optimize memory resources as recited in claim 2 , wherein determining availability of the extended memory is done by a memory allocator.

Assignments (9)
RELEASE OF SECURITY INTEREST Recorded Mar 9, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059358/0001 →
RELEASE OF SECURITY INTEREST Recorded Feb 25, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059333/0222 →
SECURITY INTEREST Recorded Sep 18, 2018
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 047103/0206 →
SECURITY INTEREST Recorded Jun 25, 2018
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 046426/0001 →
RELEASE OF SECURITY INTEREST Recorded May 29, 2018
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: MICROSEMI STORAGE SOLUTIONS, INC.; MICROSEMI STORAGE SOLUTIONS (U.S.), INC.
Reel/Frame 046251/0271 →
PATENT SECURITY AGREEMENT Recorded Feb 3, 2016
From: MICROSEMI STORAGE SOLUTIONS, INC. (F/K/A PMC-SIERRA, INC.); MICROSEMI STORAGE SOLUTIONS (U.S.), INC. (F/K/A PMC-SIERRA US, INC.)
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037689/0719 →
RELEASE OF SECURITY INTEREST Recorded Feb 1, 2016
From: BANK OF AMERICA, N.A.
To: PMC-SIERRA, INC.; PMC-SIERRA US, INC.; WINTEGRA, INC.
Reel/Frame 037675/0129 →
SECURITY INTEREST IN PATENTS Recorded Aug 6, 2013
From: PMC-SIERRA, INC.; PMC-SIERRA US, INC.; WINTEGRA, INC.
To: BANK OF AMERICA, N.A.
Reel/Frame 030947/0710 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 29, 2013
From: ADAPTEC, INC.
To: PMC-SIERRA, INC.
Reel/Frame 030899/0567 →