Protruding spacers for self-aligned contacts
View Patent ↗A protruding spacer that protrudes above the top surface of a gate electrode structure provides enhanced resistance to exposure of the gate electrode during the etch process used to form self-aligned contacts. The protruding spacer may be formed using an amorphous carbon sacrificial layer as the top layer of the patterned gate electrode structure. Dielectric spacers are formed alongside the gate electrode structure, including alongside the sacrificial amorphous carbon layer. The dielectric spacers extend substantially to the top of the amorphous carbon layer. The amorphous carbon layer is then removed such that the remaining gate structure includes dielectric spacers that have a protruding section that protrudes above the top surface of the remaining gate structure. A nitride layer may be formed over the gate structure. Such a structure prevents exposure of the gate electrode during the formation of self-aligned contacts, and shorting, once the contact openings are filled.
1. A method for forming a semiconductor product comprising:
forming a gate structure over a surface, said gate structure having a pair of opposed sidewalls and including an uppermost sacrificial layer comprising amorphous carbon and disposed over a subjacent surface, each of said sacrificial layer and said subjacent surface terminating laterally at said opposed sidewalls,
forming dielectric spacers along said sidewalls, and removing said sacrificial layer thereby exposing said subjacent surface such that each of said spacers includes a protruding section that protrudes above said subjacent surface.
2. The method as in claim 1 , wherein said surface comprises a substrate surface and further comprising:
forming source/drain regions in said substrate surface adjacent said gate structure,
forming at least one dielectric layer over said gate structure and over said substrate surface, and
forming an opening through said at least one dielectric layer thereby exposing at least one of said source/drain regions.
3. The method as in claim 2 , further comprising forming a nitride film over said gate structure, and in which said forming an opening further includes forming said opening through said nitride layer.
4. The method as in claim 1 in which said forming a gate structure includes forming said amorphous carbon using plasma enhanced chemical vapor deposition.
5. The method as in claim 4 , in which said forming said amorphous carbon using plasma enhanced chemical vapor deposition includes using propylene, C 3 H 6 , as a source gas.
6. The method as in claim 1 , in which said forming a gate structure includes:
forming a gate dielectric layer over said surface,
forming at least one gate electrode layer over said gate dielectric layer,
forming an oxide hardmask layer over said at least one gate electrode layer, said oxide hardmask layer having an upper surface that forms said subjacent surface,
forming said amorphous carbon layer as said sacrificial layer over said hardmask layer, and
forming a dielectric anti-reflective coating over said sacrificial layer; then patterning to produce said gate structure.
7. The method as in claim 6 , in which said patterning includes coating with a photosensitive material, forming a pattern including a gate region therein, then performing at least one etch operation to remove at least said dielectric anti-reflective coating, said sacrificial layer, said hardmask layer, and said at least one gate electrode layer from select areas over said surface to define said gate region.
8. The method as in claim 1 , wherein said removing said sacrificial layer comprises a selective O 2 dry etch that etches substantially only said sacrificial layer.
9. The method as in claim 1 , in which said forming a gate structure includes forming a gate dielectric layer and a gate electrode layer thereover, said forming a gate electrode layer including forming a cobalt silicide layer over a polysilicon layer.
10. The method as in claim 1 , in which said gate structure includes an upper surface formed of said sacrificial layer, and said sidewalls and said dielectric spacers extend up to said upper surface prior to said removing said sacrificial layer.
11. The method as in claim 1 , in which said forming dielectric spacers includes forming an oxide film over said gate structure, and removing portions of said oxide film thereby exposing, but not substantially attacking, said sacrificial layer.
12. The method as in claim 1 , in which said forming a gate structure includes forming an oxide hardmask film having an upper surface that forms said subjacent surface, said oxide hardmask film terminating laterally at said sidewalls.
13. A semiconductor product comprising a gate structure formed over a semiconductor substrate, said gate structure having a pair of opposed sidewalls and a first height, and a pair of dielectric spacers, each spacer extending along a respective sidewall and having a spacer height being greater than said first height; and
an amorphous carbon layer formed over an upper surface of said gate structure.
14. The semiconductor product as in claim 13 , wherein said gate structure includes an upper surface and each of said spacers protrudes above said upper surface.
15. The semiconductor product as in claim 14 , wherein each of said spacers protrudes above said upper surface by a distance ranging from 500 angstroms to 2000 angstroms.
16. The semiconductor product as in claim 14 , in which said gate structure includes a gate electrode layer and a hardmask layer disposed thereover, said upper surface being a surface of said hardmask layer.
17. The semiconductor product as in claim 13 , in which said spacers each include a generally planar inner surface that forms a conterminous portion with said respective sidewall and each spacer includes a protruding portion that extends above said respective sidewall.
18. The semiconductor product as in claim 13 , each spacer extending substantially up to a top surface of said amorphous carbon layer.
19. The semiconductor product as in claim 13 , further comprising a nitride layer formed thereover.