IP Library Granted Patent US 6,927,346
Granted Patent B2
US 6,927,346 · App. 10/326,901 · Granted Aug 9, 2005

Surface mount technology to via-in-pad interconnections

Assignee: Intel Corporation
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Quick Facts
Patent No.
US 6,927,346
App. No.
10/326,901
Granted
Aug 9, 2005
Kind
B2
Abstract

Apparatus and methods for interconnecting a SMT component interconnect to a via-in-pad (VIP) interconnect. A first reflowable material is deposited on the VIP bond pad. A sphere having a higher melt temperature than the reflow temperature of the first interconnect material is deposited on the first interconnect material. A first reflow process is performed to interconnect the sphere and the VIP bond pad while the sphere remains solid, and the first reflowable material preventing the first interconnect material from migrating into the via-in-pad.

Claims (39)

1. A method of making a via-in-pad substrate, comprising:

providing a substrate having at least one via-in-pad interconnect comprising a bond pad;

depositing a reflowable electrically conductive interconnect material on the bond pad;

depositing a sphere comprising an electrically conductive material having a melt temperature higher than the reflow temperature of the interconnect material; and

subjecting the substrate to a reflow process below the melt temperature of the sphere to interconnect the via-in-pad interconnect to the sphere with the interconnect material so as to prevent by surface tension, the interconnect material from migrating into the via-in-pad.

2. The method of claim 1 , wherein depositing a reflowable electrically conductive interconnect material on the at least one bond pad comprises:

placing a print screening mask onto the substrate, the mask comprising an

aperture corresponding to each of the at least one via-in-pad interconnects, the aperture substantially aligned with and adapted to expose at least a portion of the bond pad;

extruding a reflowable electrically conductive interconnect material through the aperture and onto the bond pad; and

removing the mask leaving the interconnect material on the bond pad.

3. The method of claim 1 , wherein depositing a reflowable electrically conductive interconnect material on the bond pad comprises:

placing a pat of preformed reflowable electrically conductive interconnect material onto the bond pad.

4. The method of claim 1 , wherein depositing a reflowable electrically conductive interconnect material comprises depositing a material selected from the group consisting of lead-free, tin-based solder of 3.5% silver (Sn/3.5Ag solder) with a melt temperature of 221 C and a reflow temperature of about 240 C, and lead-free, tin-based solder having 5% antimony (Sn/5Sb solder) with a melt temperature of 234 C and a reflow temperature of about 255 C, and wherein the sphere has a melt temperature greater than 255 C.

5. The method of claim 1 , wherein depositing a sphere comprising an electrically conductive material having a melt temperature higher than the reflow temperature of the interconnect material comprises:

depositing a sphere comprising a material selected from the group consisting of copper, silver, gold, and aluminum.

6. A method for interconnecting a component interconnect to a substrate via-in-pad interconnect, comprising:

providing a substrate having at least one via-in-pad interconnect comprising a bond pad;

depositing a first reflowable electrically conducting interconnect material on the bond pad;

depositing a sphere comprising an electrically conductive material having a melt temperature higher than the reflow temperature of the first interconnect material;

subjecting the substrate to a reflow process below the melt temperature of the sphere to interconnect each bond pad with each sphere so as to prevent, by surface tension, the interconnect material from migrating into the at least one via-in-pad;

interposing a second reflowable electrically conductive interconnect material between the component interconnect and the sphere of the corresponding via-in-pad interconnect, the second interconnect material having a reflow temperature lower than that of the sphere; and

subjecting the substrate and component to a reflow process below the melt temperature of the sphere to reflow the second reflowable interconnect material to effect an interconnection between the sphere and the component interconnect.

7. The method of claim 6 , wherein the process of depositing a first reflowable electrically conductive interconnect material on the at least one bond pad is selected from the group of processes consisting of print screening and pat placement.

8. The method of claim 6 , wherein depositing a first reflowable electrically conductive interconnect material comprises depositing a first reflowable electrically conductive interconnect material selected from the group consisting of: lead-free, tin-based solder of 3.5% silver (Sn/3.5Ag solder) with a melt temperature of 221 C and a reflow temperature of 240 C; lead-free, tin-based solder having 5% antimony (Sn/5Sb solder) with a melt temperature of 234 C and a reflow temperature of 255 C; and tin-based solder comprising 37% lead (Sn/37Pb solder) having a melt temperature of 183 C and a reflow temperature of 205 C.

9. The method of claim 6 , wherein the sphere comprises a material selected from the group consisting of copper, silver, gold, and aluminum.

10. A substrate, comprising:

at least one via-in-pad interconnect comprising a bond pad;

a reflowable electrically conductive interconnect material deposited on the bond pad; and

a sphere electrically connected with both the interconnect material and the bond pad, the sphere having a melt temperature higher than the reflow temperature of the interconnect material and disposed to prevent, by surface tension, the interconnect material from migrating into the at least one via-in-pad during a reflow process.

11. The substrate of claim 10 , wherein the sphere comprises a material selected from the group consisting of copper, silver, gold, and aluminum.

12. The substrate of claim 10 , wherein the reflowable electrically conductive interconnect material is selected from the group consisting of: lead-free, tin-based solder of 3.5% silver (Sn/3.5Ag solder) with a melt temperature of 221 C and a reflow temperature of 240 C; lead-free, tin-based solder having 5% antimony (Sn/5Sb solder) with a melt temperature of 234 C and a reflow temperature of 255 C; and tin-based solder comprising 37% lead (Sn/37Pb solder) having a melt temperature of 183 C and a reflow temperature of 205 C.

13. An electrical device, comprising:

an electrical component having at least one component interconnect;

a substrate having at least one via-in-pad interconnect comprising a bond pad;

a first reflowable electrically conductive interconnect material deposited onto the at least one bond pad;

a second reflowable electrically conductive interconnect material deposited onto the at least one component interconnect; and

a sphere comprising an electrically conductive material having a melt temperature higher than the reflow temperature of the first and second interconnect materials, the first interconnect material electrically interconnecting the sphere with the bond pad, and the second interconnect material electrically interconnecting the sphere with the component interconnect, the sphere further disposed to prevent, by surface tension, the first interconnect material from migrating into the at least one via-in-pad during a reflow process.

14. The electrical device of claim 13 , wherein the sphere comprises a material selected from the group consisting of copper, silver, gold, and aluminum.

15. The electrical device of claim 13 , wherein the first and second interconnect material is selected from the group consisting of: lead-free, tin-based solder of 3.5% silver (Sn/3.5Ag solder) with a melt temperature of 221 C and a reflow temperature of 240 C; lead-free, tin-based solder having 5% antimony (Sn/5Sb solder) with a melt temperature of 234 C and a reflow temperature of 255 C; and tin-based solder comprising 37% lead (Sn/37Pb solder) having a melt temperature of 183 C and a reflow temperature of 205 C.

Assignments (10)
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 9, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050937/0001 →
RELEASE OF SECURITY INTEREST Recorded Aug 23, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 047243/0001 →
SECURITY INTEREST Recorded Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REPLACE ERRONEOUSLY FILED PATENT #7358718 WITH THE CORRECT PATENT #7358178 PREVIOUSLY RECORDED ON REEL 038669 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Jun 8, 2017
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 043079/0001 →
PATENT SECURITY AGREEMENT Recorded Jun 2, 2016
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 038954/0001 →
SECURITY INTEREST Recorded May 12, 2016
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 038669/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 24, 2012
From: INTEL CORPORATION
To: MICRON TECHNOLOGY, INC.
Reel/Frame 029185/0623 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 12, 2012
From: NUMONYX B.V.
To: MICRON TECHNOLOGY, INC.
Reel/Frame 028362/0802 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 15, 2003
From: MCCORMICK, CAROLYN R.; DISHONGH, TERRANCE J.
To: INTEL CORPORATION
Reel/Frame 013965/0517 →
Continuity (1)
Related Publication 20040118606A1 · Jun 24, 2004