Production method for a semiconductor component
View Patent ↗A method for fabricating a semiconductor component includes: deposition of a polysilicon layer on a substrate, deposition of a precursor layer on the polysilicon layer, and deposition of a protective layer on the precursor layer. A crystalline transformation occurs in the precursor layer at a first temperature to form an electrode layer. The layers are patterned to form an electrode stack, and the polysilicon layer is oxidized at a second temperature such that no crystalline transformation occurs in the electrode layer.
1. A method for fabricating a semiconductor component, the method comprising:
providing a substrate,
depositing a polysilicon layer on the substrate,
depositing a precursor layer on the polysilicon layer,
depositing a protective layer on the precursor layer,
after depositing the protective layer, causing a crystalline transformation in the precursor layer at a first temperature, the crystalline transformation forming an electrode layer,
patterning the polysilicon layer, electrode layer, and protective layer to form an electrode stack, and
oxidizing the polysilicon layer at a second temperature such that no crystalline transformation occurs in the electrode layer, the second temperature being less than the first temperature.
2. The method of claim 1 further comprising selecting the precursor layer to include tungsten.
3. The method of claim 1 , wherein oxidizing the polysilicon comprises forming a sidewall spacer.
4. The method of claim 1 , wherein causing a crystalline transformation includes reducing the resistance in the precursor layer.
5. The method of claim 1 , further comprising selecting the precursor layer to include a tungsten silicide material.
6. The method of claim 1 , further comprising selecting the first temperature to be between 900° C. and 1080° C.
7. The method of claim 1 , further comprising providing a diffusion barrier layer beneath the precursor layer.
8. The method of claim 7 , further comprising selecting the diffusion barrier layer to include tungsten nitride.
9. The method of claim 1 , further comprising forming a hard mask from the protective layer.
10. The method of claim 9 , wherein patterning the layers further comprises etching areas exposed by the hard mask.
11. The method of claim 1 , further comprising selecting the second temperature to be between 800° C and 850° C.
12. The method of claim 1 , further comprising providing a gate oxide layer between the substrate and the polysilicon layer.