IP Library Granted Patent US 6,936,997
Granted Patent B2
US 6,936,997 · App. 10/638,227 · Granted Aug 30, 2005

Method of forming a high efficiency power controller

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Quick Facts
Patent No.
US 6,936,997
App. No.
10/638,227
Granted
Aug 30, 2005
Kind
B2
Abstract

A power controller ( 10, 70 ) forms a pass-through zone of output voltages. When the output voltage is between an upper limit and lower limit of the pass-through zone, the power controller ( 10, 70 ) continuously connects the input voltage to the output to form the output voltage. When the output voltage is above the upper limit or below the lower limit of the pass-through zone, the power controller ( 10, 70 ) switches the output transistors ( 42, 58 ) to form the output voltage.

Claims (31)

1. A method of forming a high efficiency power controller comprising:

providing a boost converter coupled in tandem with a buck converter to receive an input voltage and generate an output voltage on an output of the high efficiency power controller;

forming the high efficiency power controller to operate the buck converter in a switching mode when the output voltage is greater than a first value and to operate the boost converter in a switching mode when the output voltage is less than a second value wherein the first value is greater than the second value; and

forming the high efficiency power controller to constantly couple the input voltage to the output and not operate the buck converter or the boost converter in a switching mode when the output voltage is less than the first value and greater then the second value.

2. The method of claim 1 wherein forming the high efficiency power controller to constantly couple the input voltage to the output includes forming the high efficiency power controller to constantly enable an output transistor of the buck converter and disable an output transistor of the boost converter.

3. The method of claim 2 wherein forming the high efficiency power controller to constantly enable the output transistor of the buck converter and disable the output transistor of the boost converter includes coupling a first amplifier to receive a feedback voltage representative of the output voltage and to receive a first reference voltage and responsively generate a control voltage and including using the control voltage to enable the output transistor of the buck converter, and coupling a second amplifier to receive the control voltage and using an output of the second amplifier to disable the output transistor of the boost converter.

4. The method of claim 1 wherein forming the high efficiency power controller to constantly couple the input voltage to the output and not operate the buck converter or the boost converter in a switching mode when the output voltage is less than the first value and greater than the second value includes forming the high efficiency power controller to generate a control voltage having a first voltage representative of the first value and a second voltage representative of the second value.

5. The method of claim 4 wherein forming the high efficiency power controller to generate the control voltage having the first voltage representative of the first value and the second voltage representative of the second value includes coupling a first amplifier to receive a feedback voltage representative of the output voltage and to receive a first reference voltage, and coupling a second amplifier to receive a second reference voltage and the control voltage.

6. The method of claim 5 further including coupling a first comparator to receive an output of the second amplifier and receive an oscillating signal and responsively drive an output transistor of the boost converter.

7. The method of claim 6 further including coupling a second comparator to receive the control voltage and receive the oscillating signal and responsively drive an output transistor of the buck converter.

8. The method of claim 7 further including coupling a third amplifier to receive the feedback voltage and to receive a third reference voltage, and coupling an output of the third amplifier to an output of the first amplifier.

9. The method of claim 4 further including coupling a first comparator to receive the control voltage and receive an oscillating voltage and responsively drive an output transistor of the buck converter.

10. A method of operating a high efficiency power controller comprising:

coupling a boost controller in tandem with a buck controller;

continuously coupling an input voltage to an output of the high efficiency power controller and not switchingly operating either the buck controller or the boost controller when an output voltage on the output is less than a first value and greater than a second value wherein the first value is greater than the second value.

11. The method of claim 10 further including switchingly coupling the input voltage to the output when the output voltage is greater than the first value or less than the second value.

12. The method of claim 11 wherein switchingly coupling the input voltage to the output when the output voltage is greater than the first value or less than the second value includes providing a boost converter coupled in tandem with a buck converter to receive the input voltage and generate the output voltage; and switching the buck converter when the output voltage is greater than the first value and switching the boost converter when the output voltage is less than the second value.

13. The method of claim 11 wherein continuously coupling the input voltage to the output of the high efficiency power controller and not switchingly operating either the buck controller or the boost controller when the output voltage on the output is no greater than the first value and no less than the second value wherein the first value is greater than the second value includes generating a control voltage having a first voltage representative of the first value and a second voltage representative of the second value and using the control voltage to control an output transistor of a buck converter and an output transistor of a boost converter.

14. The method of claim 13 wherein using the control voltage to control the output transistor of the buck converter and the output transistor of the boost converter includes enabling the output transistor of the buck converter and disabling the output transistor of the boost converter for continuously coupling the input voltage to the output.

15. The method of claim 13 wherein generating the control voltage having the first voltage representative of the first value and the second voltage representative of the second value includes generating a first reference voltage and a second reference voltage and using the first reference voltage and the second reference voltage to generate the control voltage.

16. The method of claim 15 wherein using the first reference voltage and the second reference voltage to generate the control voltage includes amplifying a difference between the first reference voltage and a feedback voltage and amplifying a difference between the second reference voltage and the feedback voltage.

17. The method of claim 10 wherein continuously coupling the input voltage to the output of the high efficiency power controller and not switchingly operating either the buck controller or the boost controller when the output voltage on the output is no greater than the first value and no less than the second value wherein the first value is greater than the second value includes providing a boost converter coupled in tandem with a buck converter to receive the input voltage and generate the output voltage on an output; and

switching the buck converter when the output voltage is greater than the first value and switching the boost converter when the output voltage is less than the second value.

18. A high efficiency power controller comprising:

a first output transistor coupled in a buck configuration;

a second output transistor coupled in a boost configuration;

a first error amplifier coupled to receive a feedback voltage that is representative of an output voltage and responsively generate a control voltage;

a first comparator coupled to receive the control voltage and responsively switch the first output transistor when the control voltage is greater than a first value; and

an adder-subtractor amplifier coupled to receive the control voltage and responsively switch the second output transistor when the control voltage is less than a second value, the high efficiency power controller configured to continuously couple an input voltage to the output voltage and inhibit switchingly operating both the buck controller and the boost controller when the output voltage is at least about ten per cent less than a desired value of the output voltage and the first value is at least about ten per cent greater than the desired value of the output voltage.

19. The high efficiency power controller of claim 18 further including a second error amplifier coupled to receive the feedback voltage and responsively generate the control voltage.

20. The high efficiency power controller of claim 18 wherein the adder-subtractor amplifier coupled to receive the control voltage and responsively switch the second output transistor includes a second comparator coupled to receive the control voltage and responsively switch the second output transistor.

Assignments (8)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 038620, FRAME 0087 Recorded Jun 22, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064070/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT PATENT NUMBER 5859768 AND TO RECITE COLLATERAL AGENT ROLE OF RECEIVING PARTY IN THE SECURITY INTEREST PREVIOUSLY RECORDED ON REEL 038620 FRAME 0087. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Aug 25, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 039853/0001 →
RELEASE OF SECURITY INTEREST Recorded May 6, 2016
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT AND COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 038631/0345 →
RELEASE OF SECURITY INTEREST Recorded May 6, 2016
From: JPMORGAN CHASE BANK, N.A. (ON ITS BEHALF AND ON BEHALF OF ITS PREDECESSOR IN INTEREST, CHASE MANHATTAN BANK)
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 038632/0074 →
SECURITY INTEREST Recorded Apr 15, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH
Reel/Frame 038620/0087 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 31, 2005
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 016183/0001 →
SECURITY INTEREST Recorded Dec 23, 2003
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: JPMORGAN CHASE BANK, AS COLLATERAL AGENT
Reel/Frame 014830/0212 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 11, 2003
From: MULLETT, CHARLES E.
To: SEMICONDUCTOR COMPONENTS INDUSTRIES LLC
Reel/Frame 014386/0976 →