Semiconductor device testing apparatus, semiconductor device testing system, and semiconductor device testing method for measuring and trimming the output impedance of driver devices
View Patent ↗The disclosure relates to a semiconductor device testing apparatus, a semiconductor device testing system, and a semiconductor device testing method, in particular a method for measuring or trimming, respectively, the impedance of driver devices provided in a semiconductor device, wherein a device, in particular a driver device, comprising each a pull-up circuit and a pull-down circuit is used, and wherein the method includes: joint activating of both the pull-up circuit and the pull-down circuit; and determining a first current flowing through the pull-up circuit or the pull-down circuit, respectively, with jointly activated pull-up and pull-down circuits.
1. A method for measuring and trimming the impedance of a driver device in a semiconductor device during a test being carried out before the regular operation of the semiconductor device, the driver device of the semiconductor device including each a pull-up circuit and a pull-down circuit, the method comprising:
substantially simultaneously activating both the pull-up circuit and the pull-down circuit; and
determining a first current flowing through the pull-up circuit or the pull-down circuit, respectively, with substantially simultaneously activated pull-up and pull down circuits during the test carried out before the regular operation of the semiconductor device.
2. The method according to claim 1 , further comprising:
determining a voltage dropping over the pull-up and/or pull-down circuit, in particular with substantially simultaneously activated pull-up and pull-down circuits.
3. The method according to claim 1 , further comprising:
determining a voltage dropping over the substantially simultaneously activated pull-up and pull-down circuits.
4. The method according to claim 1 , wherein one or several of the method steps are performed several times in sequence, each with different settings of transistors contained in the pull-up or pull-down circuits, respectively.
5. The method according to claim 1 , the method comprising: determining a total impedance of the pull-up and pull-down circuits.
6. The method according to claim 4 , wherein, on the basis of a total impedance determined or the first current determined, respectively, and a voltage dropping over the pull-up and/or pull-down circuit as determined, one of said settings is selected that is to be used during regular operation of the device.
7. The method according to claim 1 , wherein the device is a driver device used for the driving of output signals during the regular operation of the semiconductor device during the test carried out before the regular operation of the semiconductor device.
8. The method according to claim 1 , wherein the device is a test device not used for the driving of output signals during the regular operation of the semiconductor device, the test device for selecting the driver setting for at least one other semiconductor device during the test carried out before the regular operation of the at least one other semiconductor device.
9. The method according to claim 8 , wherein the test device is connected with a device provided on the semiconductor device itself, by means of which a voltage dropping over the pull-up and/or pull-down circuit is determined.
10. A method for measuring and trimming the impedance of a driver device in a semiconductor device during a test being carried out before the regular operation of the semiconductor device, the driver device of the semiconductor device including each a pull-up circuit and a pull-down circuit, the method comprising:
joint activating both the pull-up circuit and the pull-down circuit; and
determining a first current flowing through the pull-up circuit or the pull-down circuit, respectively, with jointly activated pull-up and pull down circuits during the test carried out before the regular operation of the semiconductor device; wherein the pull-up or pull-down circuits, respectively, are connected to a supply voltage pad or a ground connection, respectively, of the semiconductor device, and the method further comprising:
joint de-activating both the pull-up circuit and the pull-down circuit; and
determining a standby current flowing between the supply voltage pad and the ground connection with jointly de-activated pull-up and pull down circuits.
11. The method according to claim 10 , wherein the pull-up or pull-down circuits, respectively, are connected to a voltage supply pad or a ground connection, respectively, of the semiconductor device, and the method further comprising:
joint activating both the pull-up circuit and the pull-down circuit; and
determining a total current flowing between the supply voltage pad and the ground connection with jointly activated pull-up and pull-down circuits.
12. The method according to claim 11 , further comprising determining the first current by deducting the standby current from the total current.