IP Library Granted Patent US 7,010,453
Granted Patent B2
US 7,010,453 · App. 10/685,885 · Granted Mar 7, 2006

Methods and apparatus for optimizing lists of waveforms

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Quick Facts
Patent No.
US 7,010,453
App. No.
10/685,885
Granted
Mar 7, 2006
Kind
B2
Abstract

A list of waveforms is received (the list being one that is to be driven to or received from a pin of a device under test). The list of waveforms is de-interleaved to form lists of non-interleaved waveforms. Each list of non-interleaved waveforms is then optimized by combining at least two of its entries. By way of example, the above method may be implemented by program code stored on a number of computer readable media, or by a circuit tester having program code for implementing same.

Claims (41)

1. A computer-implemented method for optimizing a list of interleaved waveforms that are to be driven to or received from a pin of a device under test, comprising:

receiving the list of interleaved waveforms;

de-interleaving the list of interleaved waveforms to form lists of non-interleaved waveforms;

optimizing each list of non-interleaved waveforms for a different one of a plurality of waveform memories, each waveform memory of which is associated with the pin of the device under test, by combining at least two of the list's entries; and

outputting the waveforms of the optimized lists in a computer-readable form suitable for programming the plurality of waveform memories.

2. The method of claim 1 , wherein entries in one of the lists of non-interleaved waveforms are combined based on identity of the entries.

3. The method of claim 1 , wherein entries in one of the lists of non-interleaved waveforms are combined by masking an entry of one type with an entry of another type.

4. The method of claim 3 , wherein said maskings are chosen to preserve a greatest number of test sample points.

5. The method of claim 1 , wherein entries in one of the lists of non-interleaved waveforms are combined by masking two of the list's entries with a waveform not in the list.

6. The method of claim 1 , wherein:

each entry in the list of interleaved waveforms is associated with a weight;

the weight associated with an entry in the list of interleaved waveforms is associated with a corresponding entry in each of the lists of non-interleaved waveforms; and

as entries in the lists of non-interleaved waveforms are combined, the weights associated with the combined entries are also combined.

7. The method of claim 6 , wherein entries in one of the lists of non-interleaved waveforms are combined to preserve a greatest number of test sample points.

8. The method of claim 6 , further comprising, ordering the entries of each optimized list in accordance with the weights of the entries, and then re-interleaving the optimized ordered lists.

9. The method of claim 6 , wherein the weights are statistical weights.

10. The method of claim 6 , wherein the weights are priority weights.

11. The method of claim 1 , further comprising, as each list of non-interleaved waveforms is optimized, maintaining the same number of entries in each optimized list.

12. The method of claim 1 , further comprising, re-interleaving the optimized lists, and presenting the re-interleaved list to a user.

13. The method of claim 1 , further comprising, combining entries in each list of non-interleaved waveforms, until each list of non-interleaved waveforms comprises fewer entries than a waveform memory size.

14. The method of claim 1 , further comprising, using each optimized list to program a different waveform memory of a circuit tester.

15. An apparatus for optimizing a list of interleaved waveforms that are to be driven to or received from a pin of a device under test, comprising:

a number of computer readable media; and program code, stored on the computer readable media, defining:

an interface to receive the list of interleaved waveforms;

program code to de-interleave the list of interleaved waveforms to form lists of non-interleaved waveforms; and

program code to i) optimize each of the lists of non-interleaved waveforms for a different one of a plurality of waveform memories, each waveform memory of which is associated with the pin of the device under test, by combining at least two of the list's entries, and then ii) output the waveforms of the optimized lists in a computer-readable form suitable for programming the plurality of waveform memories.

16. The apparatus of claim 15 , wherein the program code further comprises an interface to receive an interleave factor; the interleave factor being used by the program code to de-interleave the list of interleaved waveforms.

17. The apparatus of claim 15 , wherein the program code combines entries in each list of non-interleaved waveforms until each list of non-interleaved waveforms comprises fewer entries than a waveform memory size.

18. The apparatus of claim 15 , further comprising program code to re-interleave the optimized lists and present the re-interleaved list to a user.

19. The apparatus of claim 15 , further comprising program code to order the entries of each optimized list and re-interleave the optimized ordered lists.

20. A circuit tester, comprising:

a plurality of driving probes and receiving probes;

a plurality of waveform memories;

a switching network to associate plural multiplexed waveform memories with ones of the driving probes and receiving probes;

an interface to receive lists of interleaved waveforms that are to be driven to and received from the driving probes and receiving probes;

program code to de-interleave each list of waveforms, thereby forming a set of lists of non-interleaved waveforms for each list of interleaved waveforms;

program code to optimize each list of non-interleaved waveforms by combining at least two of the list's entries; and

program code to program the waveform memories corresponding to the optimized lists.

21. The circuit tester of claim 20 , wherein the program code further comprises an interface to receive an interleave factor; the interleave factor being used by the program code to de-interleave the list of interleaved waveforms.

22. The circuit tester of claim 20 , wherein the program code combines entries in each list of non-interleaved waveforms until each list of non-interleaved waveforms comprises fewer entries than a size of the waveform memories.

23. The circuit tester of claim 20 , further comprising program code to re-interleave the optimized lists and present the re-interleaved list to a user.

Assignments (6)
CHANGE OF ADDRESS Recorded Dec 18, 2018
From: ADVANTEST CORPORATION
To: ADVANTEST CORPORATION
Reel/Frame 047987/0626 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE ADDRESS PREVIOUSLY RECORDED AT REEL: 035371 FRAME: 0265. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Apr 14, 2015
From: ADVANTEST (SINGAPORE) PTE. LTD.
To: ADVANTEST CORPORATION
Reel/Frame 035425/0768 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 6, 2015
From: ADVANTEST (SINGAPORE) PTE. LTD.
To: ADVANTEST CORPORATION
Reel/Frame 035371/0265 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 20, 2012
From: VERIGY (SINGAPORE) PTE LTD
To: ADVANTEST (SINGAPORE) PTE LTD
Reel/Frame 027896/0018 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 18, 2007
From: AGILENT TECHNOLOGIES, INC.
To: VERIGY (SINGAPORE) PTE. LTD.
Reel/Frame 019990/0760 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 22, 2004
From: HILDEBRANT, ANDREW S.
To: AGILENT TECHNOLOGIES, INC.
Reel/Frame 014279/0196 →