IP Library Granted Patent US 7,409,561
Granted Patent B1
US 7,409,561 · App. 10/709,967 · Granted Aug 5, 2008

Piracy protection for combined hardware/software products

Assignee: LSI Corporation
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Quick Facts
Patent No.
US 7,409,561
App. No.
10/709,967
Granted
Aug 5, 2008
Kind
B1
Abstract

An apparatus, computer program product, and method for preventing piracy in combined hardware/software products, and specifically in RAID storage systems is disclosed. In a preferred embodiment of the present invention, when a hardware device (a disk controller, in a preferred embodiment) is initialized, the device executes firmware that directs it to write a signature to a storage location (scratchpad register) in the device, where the signature corresponds to a set of product features authorized for use with the hardware device. When application code executing on the host computer system attempts to access a feature (e.g., through device driver code), the stored signature is read from the hardware device. The code implementing the feature is allowed to execute only if the signature that is read from the hardware device matches a feature level of the product in which that feature is authorized.

Claims (32)

1. A computer system comprising:

a bus system;

a device controller connected to the bus system, wherein the device controller includes an embedded processor and a scratchpad memory, and wherein the scratchpad memory is readable via the bus system; and

at least one central processor connected to the bus system,

wherein upon initialization of the device controller, the embedded processor stores a signature in the scratchpad memory, wherein the signature identifies a set of product features authorized for use with the device controller, and

wherein the at least one central processor receives the signature from the scratchpad memory via the bus system and directs the device controller to perform a particular action only if the action is a product feature identified as authorized by the signature.

2. The computer system of claim 1 , wherein the device controller controls an array of storage devices.

3. The computer system of claim 2 , wherein the array of storage devices is a redundant array of independent disks (RAID).

4. The computer system of claim 1 , wherein the at least one central processor executes a device driver to control the device controller and in response to reading the signature the at least one central processor disables device driver functions not identified as authorized by the signature.

5. The computer system of claim 1 , wherein the embedded processor executes internal firmware of the device controller to store the signature in the scratchpad memory.

6. A peripheral device for use in conjunction with a computer system, the peripheral device comprising:

a device interface for communicating with the computer system;

a scratchpad register; and

initialization hardware, wherein the initialization hardware, during initialization of the peripheral device, communicates to the computer system, through the scratchpad register, a signature identifying an authorized subset of operations associated with a device driver executing on the computer system, wherein the device driver is adapted to perform only those operations identified as authorized by the subset.

7. The peripheral device of claim 6 , wherein the peripheral device forms a device controller card connected to the computer system through the device interface.

8. The peripheral device of claim 7 , wherein the device controller card controls an array of storage devices.

9. The peripheral device of claim 6 , wherein the initialization hardware includes an embedded processor resident within the peripheral device, wherein the embedded processor stores the signature in the scratchpad register.

10. The peripheral device of claim 6 , wherein the scratchpad register is contained within random-access memory resident within the peripheral device.

11. The peripheral device of claim 6 , wherein the device interface is a bus interface adapted to communicate through a bus of the computer system.

12. The peripheral device of claim 6 , wherein the scratchpad register is adapted to be read by the device driver.

13. The peripheral device of claim 12 , wherein the device driver executes externally with respect to the peripheral device.

14. A method of controlling a peripheral device connected to a computer system, comprising:

initializing the peripheral device, wherein during said initializing, an initialization hardware of the peripheral device communicates a signature to the computer system, wherein the signature identifies an authorized subset of device driver features corresponding to a device driver executed by the computer system;

receiving, by the computer system, the signature from the peripheral device;

in response to receiving the signature from the peripheral device, enabling, by the computer system, device driver functions corresponding to the authorized subset while disabling those device driver functions not authorized by the received signature.

15. The method of claim 14 , wherein the peripheral device communicates the signature to the computer system via a scratchpad register resident on the peripheral device and accessible to the computer system.

16. The method of claim 15 , wherein the hardware of the peripheral device includes an embedded processor and the embedded processor communicates the signature to the computer system via the scratchpad register.

17. The method of claim 14 , wherein the peripheral device controls an array of storage devices and the peripheral device.

18. The method of claim 16 , wherein the peripheral device's control of the array of storage devices is directed by the device driver.

19. The method of claim 14 , wherein the device driver is executed by a processor within the computer system, and wherein the processor is external to the peripheral device.

20. The method of claim 14 , wherein the peripheral device is a device controller card.

21. The method of claim 14 , wherein the signature is determined by firmware contained within with the peripheral device.

Assignments (11)
CORRECTIVE ASSIGNMENT TO CORRECT THE ERROR IN RECORDING THE MERGER PREVIOUSLY RECORDED AT REEL: 047357 FRAME: 0302. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Mar 22, 2019
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 048674/0834 →
CORRECTIVE ASSIGNMENT TO CORRECT THE EFFECTIVE DATE OF MERGER PREVIOUSLY RECORDED ON REEL 047195 FRAME 0658. ASSIGNOR(S) HEREBY CONFIRMS THE THE EFFECTIVE DATE IS 09/05/2018. Recorded Oct 29, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047357/0302 →
MERGER Recorded Oct 4, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047195/0658 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041710/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037808/0001 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT RIGHTS (RELEASES RF 032856-0031) Recorded Feb 2, 2016
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: LSI CORPORATION; AGERE SYSTEMS LLC
Reel/Frame 037684/0039 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 20, 2015
From: LSI CORPORATION
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 035058/0248 →
CHANGE OF NAME Recorded Jun 6, 2014
From: LSI LOGIC CORPORATION
To: LSI CORPORATION
Reel/Frame 033102/0270 →
PATENT SECURITY AGREEMENT Recorded May 8, 2014
From: LSI CORPORATION; AGERE SYSTEMS LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 032856/0031 →
MERGER Recorded Feb 19, 2008
From: LSI SUBSIDIARY CORP.
To: LSI CORPORATION
Reel/Frame 020548/0977 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 17, 2004
From: KOLLI, NEELA SYAM; SAXENA, AJITABH PRAKASH; LINGAMSETTY, KRISHNA KISHORE
To: LSI LOGIC CORPORATION
Reel/Frame 014741/0016 →