IP Library Granted Patent US 7,412,090
Granted Patent B2
US 7,412,090 · App. 10/711,310 · Granted Aug 12, 2008

Method of managing wafer defects

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Quick Facts
Patent No.
US 7,412,090
App. No.
10/711,310
Granted
Aug 12, 2008
Kind
B2
Abstract

A method of managing wafer defects includes inspecting each chip in a wafer to generate a unit of wafer defect raw data, using a server to integrate the unit of wafer defect raw data to generate a unit of wafer defect distribution data for recording positions, types, and sizes of defects, using the server to generate a corresponding drawing file according to the unit wafer defect distribution data to show all kinds of defect distributions, and transmitting the drawing file to a terminal such that terminal users can view the defect distributions without receiving the unit of wafer defect raw data.

Claims (11)

1. A method for managing wafer defects comprising:

performing an inspection step to inspect defects on each chip of each wafer and generating corresponding wafer defect raw data;

performing a data pre-treatment step with a server to integrate the wafer defect raw data according to each chip of the same wafer and generate wafer defect distribution data for recording position, type, and size of defect;

performing a drawing pre-treatment step with the server to generate a corresponding drawing file according to a new position, type, and size of a defect after the wafer defect distribution data is transferred integrally to display each distribution mode of each defect on the wafer on a screen; and

performing a network management step to transmit the drawing file to a terminal without receiving the wafer defect raw data at the terminal such that a terminal user is capable of seeing the defect distributions of each chip of the wafer according to the drawing file on the drawing screen;

wherein the wafer defect raw data records a position of a wafer defect relative to a chip grid, the inspection step performs defect inspection in at least two different inspection stations in sequence to generate the corresponding wafer defect raw data, and the data pre-treatment step further comprises subtracting a defect position recorded by the wafer defect raw data of a prior wafer inspection station from the wafer defect raw data corresponding to a given wafer inspection station to generate the data of a new defect in the wafer inspection station and record the data of the new defect in the wafer defect distribution data.

2. The method of claim 1 , wherein the wafer defect raw data records a position of a wafer defect relative to a chip grid, and the data pre-treatment step transfers the position of the wafer defect to a position corresponding to the origin of the wafer to make the wafer defect distribution data record the position of the wafer defect relative to the origin.

3. The method of claim 1 , wherein the size of the drawing file generated by the server is smaller than the sum of all wafer defect raw data corresponding to a wafer.

4. The method of claim 1 , wherein the drawing file generated by the server is compressed, and is uncompressed by the terminal.

5. The method of claim 1 , wherein the data pre-treatment step is according to a plurality of wafers to generate corresponding wafer defect distribution data by the server and wherein the drawing pre-treatment step is according to a plurality of wafer defect distribution data to generate a corresponding drawing file by the server.

6. The method of claim 5 , wherein the network management step includes transmitting a plurality of drawing files to the terminal, and the terminal displaying the plurality of drawing files simultaneously on the displaying screen to present a plurality of distribution modes of wafer defects.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 14, 2019
From: POWERCHIP TECHNOLOGY CORPORATION
To: POWERCHIP SEMICONDUCTOR MANUFACTURING CORPORATION
Reel/Frame 049746/0981 →
CHANGE OF NAME Recorded Jun 28, 2019
From: POWERCHIP SEMICONDUCTOR CORP.
To: POWERCHIP TECHNOLOGY CORPORATION
Reel/Frame 049629/0240 →
CHANGE OF THE ADDRESS OF THE ASSIGNEE Recorded Jun 10, 2008
From: POWERCHIP SEMICONDUCTOR CORP.
To: POWERCHIP SEMICONDUCTOR CORP.
Reel/Frame 021068/0646 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 9, 2004
From: TAI, HUNG-EN; CHEN, CHIA-YUN; WANG, SHENG-JEN
To: POWERCHIP SEMICONDUCTOR CORP.
Reel/Frame 015102/0436 →