IP Library Granted Patent US 6,953,712
Granted Patent B2
US 6,953,712 · App. 10/724,918 · Granted Oct 11, 2005

Circuit device manufacturing method

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Quick Facts
Patent No.
US 6,953,712
App. No.
10/724,918
Granted
Oct 11, 2005
Kind
B2
Abstract

A circuit device manufacturing method is provided, wherein the adhesion of an overcoat resin, formed on a conductive wiring layer, to a sealing resin layer is improved by irradiating plasma onto the overcoat resin. A first conductive film 23 A and a second conductive film 23 B, which are laminated with an interlayer insulating layer 22 interposed in between, are formed. By selectively removing the first conductive film, a first conductive wiring layer 12 A is formed and the first conductive wiring layer is covered with an overcoat resin 18 . Overcoat resin 18 is irradiated with plasma to roughen its top surface. A sealing resin layer 17 is formed so as to cover the top surface of the roughened overcoat resin 18 and circuit elements 13.

Claims (20)

1. A circuit device manufacturing method comprising:

forming conductive films that are laminated in multiple layers with interlayer insulating layers interposed in between;

forming a first conductive wiring layer by selective removal of the conductive film at a top surface;

forming through holes in the interlayer insulating layers and forming connection means in the through holes to electrically connect the first conductive wiring layer with the conductive film at a rear surface;

affixing a circuit element to the first conductive wiring layer and electrically connecting the circuit element to the first conductive wiring layer via conductive wires;

irradiating plasma onto the first conductive wiring layer, the circuit element and the conductive wires; and

forming a resin layer so as to cover the circuit element; and

forming a second conductive wiring layer by selective removal of the conductive film at the rear surface after the irradiation.

2. The method of claim 1 , wherein the conductive wiring layer is covered with resin while exposing locations that are to become pads.

3. The method of claim 2 , wherein in the step of irradiating plasma, the plasma is irradiated onto a top surface of the resin as well to roughen the top surface of the resin while a voltage, which is charged up in the resin, is released from the conductive wiring layer and via the conductive films.

4. The method of claim 1 , wherein connection means, comprising a plating film, are formed in the through holes to electrically connect the conductive wiring layer and the conductive film.

5. The method of claim 1 , wherein the plasma irradiation is carried out using oxygen gas or ozone.

6. The method of claim 1 , wherein the plasma irradiation is carried out using an inert gas, such as argon, neon, or helium.

7. The method of claim 6 , wherein in the process of irradiating the plasma using argon, ion energy of argon is in a range of 40 eV to 100 eV.

8. The method of claim 1 , wherein the plasma irradiation includes using an oxygen gas and wherein, after performing the plasma irradiation using oxygen gas, plasma irradiation using an inert gas, such as argon, neon, or helium, is carried out.

9. The method of claim 1 , wherein the conductive film is formed of a metal having copper as a principal material.

10. The method of claim 1 , wherein the circuit element is semiconductor element that is electrically connected via metal wires to the conductive wiring layer.

11. The method of claim 1 , wherein the circuit element is semiconductor element that is mounted in a face-down manner.

12. The method of claim 11 , wherein the circuit element is electrically connected to the conductive wiring layer via soft solder or other solder material.

13. The method of claim 1 wherein the first conductive wiring layer is covered by overcoat resin.

Assignments (6)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 038620, FRAME 0087 Recorded Jun 22, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064070/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT PATENT NUMBER 5859768 AND TO RECITE COLLATERAL AGENT ROLE OF RECEIVING PARTY IN THE SECURITY INTEREST PREVIOUSLY RECORDED ON REEL 038620 FRAME 0087. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Aug 25, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 039853/0001 →
SECURITY INTEREST Recorded Apr 15, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH
Reel/Frame 038620/0087 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 10, 2014
From: KANTO SANYO SEMICONDUCTOR CO., LTD.
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 033713/0296 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 4, 2014
From: SANYO ELECTRIC CO., LTD
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 033670/0750 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 16, 2004
From: USUI, RYOSUKE; MIZUHARA, HIDEKI; IGARASHI, YUSUKE; SAKAMOTO, NORIAKI
To: SANYO ELECTRIC CO. LTD.; KANTO SANYO SEMICONDUCTORS CO., LTD.
Reel/Frame 015225/0599 →