IP Library Granted Patent US 7,328,417
Granted Patent B2
US 7,328,417 · App. 10/732,395 · Granted Feb 5, 2008

Cell-based method for creating slotted metal in semiconductor designs

Assignee: LSI Logic Corporation
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Quick Facts
Patent No.
US 7,328,417
App. No.
10/732,395
Granted
Feb 5, 2008
Kind
B2
Abstract

A computer-implemented method for creating slotted metal structures in a semiconductor design is disclosed. Aspects of the present invention include providing a library of different types of pre-slotted building block elements. Thereafter, during chip design, a plurality of the elements are selected from the library and placed in the design in abutment to form a composite slotted metal structure.

Claims (48)

1. A method for creating slotted metal structures in a semiconductor design, comprising;

(a) providing a library of different types of pre-slotted building block elements, wherein the building block elements comprise cells;

(b) during chip design, selecting a plurality of the elements from the library and placing the elements in the design in abutment to form a composite slotted metal structure;

(c) providing each type of cell with predefined notches on at least one edge thereof, such that when abutted with a notched edge of another element, the notches create a slot; and

(d) stitching the edges of the cells together using a routing tool.

2. The method of claim 1 wherein step (a) further includes the step of: providing the library with a first type of cell comprising a metal center and four notched edges.

3. The method of claim 2 wherein step (a) further includes the step of: providing the library with a second type of cell comprising a metal center, one metal edge, and three notched edges.

4. The method of claim 3 wherein step (a) further includes the step of: providing the library with a third type of cell comprising a metal center, two metal opposing edges, and two notched opposing edges.

5. The method of claim 4 wherein step (a) further includes the step of: providing the library with a fourth type of cell comprising a metal center, two adjacent metal edges, and two adjacent notched edges.

6. The method of claim 5 wherein step (a) further includes the step of: providing the library with a fifth type of cell comprising a diagonal metal edge and two notched edges.

7. The method of claim 6 wherein step (a) further includes the step of: providing the library with a sixth type of cell comprising a slotted center and three metal edges.

8. The method of claim 7 wherein step (a) further includes the step of: providing the library with a seventh type of cell comprising multiple smaller cells and having built-in internal slots.

9. The method of claim 1 wherein step (a) further includes the step of: after the library of cells has been provided, pre-characterizing each of the cells for electrical properties.

10. The method of claim 1 further including the step of: implementing steps (a) and (b) as a slotting software tool that includes a user interface that enables a user to create the library of cells, and also enables a user to view the cells in the library, select cells, and place the cells in locations in the design during chip design.

11. The method of claim 10 wherein the slotting software tool enables the user to manipulate the cells, including flipping and rotating selected cells, thereby reducing the number of cells needed in the library.

12. The method of claim 10 wherein large metal structures are first inserted into the design and thereafter, the slotting tool is used to examine the design and replace each existing large metal structure with appropriate slotted cells.

13. The method of claim 1 wherein step (b) further includes the step of: allowing the user to align cells with gaps in-between.

14. A computer-readable medium containing program instructions for creating slotted metal structures in a semiconductor design, the program instructions for;

(a) providing a library of different types of pre-slotted building block elements, wherein the building block elements comprise cells;

(b) during chip design, selecting a plurality of the elements from the library and placing the elements in the design in abutment to form a composite slotted metal structure; and

(c) providing each type of cell with predefined notches on at least one edge thereof, such that when abutted with a notched edge of another element, the notches create a slot; and

(d) stitching the edges of the cells together using a routing tool.

15. The computer-readable medium of claim 14 wherein instruction (a) further includes the instruction of: providing the library with a first type of cell comprising a metal center and four notched edges.

16. The computer-readable medium of claim 15 wherein instruction (a) further includes the instruction of: providing the library with a second type of cell comprising a metal center, one metal edge, and three notched edges.

17. The computer-readable medium of claim 16 wherein instruction (a) further includes the instruction of: providing the library with a third type of cell comprising a metal center, two metal opposing edges, and two notched opposing edges.

18. The computer-readable medium of claim 17 wherein instruction (a) further includes the instruction of: providing the library with a fourth type of cell comprising a metal center, two adjacent metal edges, and two adjacent notched edges.

19. The computer-readable medium of claim 18 wherein instruction (a) further includes the instruction of: providing the library with a fifth type of cell comprising a diagonal metal edge and two notched edges.

20. The computer-readable medium of claim 19 wherein instruction (a) further includes the instruction of: providing the library with a sixth type of cell comprising a slotted center and three metal edges.

21. The computer-readable medium of claim 20 wherein instruction (a) further includes the instruction of: providing the library with a seventh type of cell comprising multiple smaller cells and having built-in internal slots.

22. The computer-readable medium of claim 14 wherein instruction (a) further includes the instruction of: after the library of cells has been provided, pre-characterizing each of the cells for electrical properties.

23. The computer-readable medium of claim 14 further including the instruction of: implementing instructions (a) and (b) as a slotting software tool that includes a user interface that enables a user to create the library of cells, and also enables a user to view the cells in the library, select cells, and place the cells in locations in the design during chip design.

24. The computer-readable medium of claim 23 wherein the slotting software tool enables the user to manipulate the cells, including flipping and rotating selected cells, thereby reducing the number of cells needed in the library.

25. The computer-readable medium of claim 23 wherein large metal structures are first inserted into the design and thereafter, the slotting tool is used to examine the design and replace each existing large metal structure with appropriate slotted cells.

26. The computer-readable medium of claim 14 wherein instruction (b) further includes the instruction of: allowing the user to align cells with gaps in-between.

27. A slotting software tool for creating slotted metal structures in a semiconductor design comprising:

a library of different types of pre-slotted building block elements, wherein the building block elements comprise cells, and wherein each type of cell has predefined notches on at least one edge thereof, such that when abutted with a notched edge of another element, the notches create the slotted metal structure, wherein a routing tool is used to stitch the edges of the cells together; and

a user interface that enables a user to view the building block elements in the library, select a plurality of building block elements, and to place the plurality building block elements in locations in a design during chip design.

28. The software tool of claim 27 wherein the library is provided with a first type of cell comprising a metal center and four notched edges.

29. The software tool of claim 28 wherein the library is provided with a second type of cell comprising a metal center, one metal edge, and three notched edges.

30. The software tool of claim 29 wherein the library is provided with a third type of cell comprising a metal center, two metal opposing edges, and two notched opposing edges.

31. The software tool of claim 30 wherein the library is provided with a fourth type of cell comprising a metal center, two adjacent metal edges, and two adjacent notched edges.

32. The software tool of claim 31 wherein the library is provided with a fifth type of cell comprising a diagonal metal edge and two notched edges.

33. The software tool of claim 32 wherein the library is provided with a sixth type of cell comprising a slotted center and three metal edges.

34. The software tool of claim 33 wherein the library is provided with a seventh type of cell comprising multiple smaller cells and having built-in internal slots.

35. The software tool of claim 27 wherein after the library of cells has been created, the software tool enables the user to pre-characterize each of the cells for electrical properties.

36. The software tool of claim 35 wherein the slotting software tool enables the user to manipulate the cells, including flipping and rotating selected cells, thereby reducing the number of cells needed in the library.

37. The software tool of claim 35 wherein large metal structures are first inserted into the design and thereafter, the slotting tool examines the design and replaces each existing large metal structure with appropriate slotted cells.

38. The software tool of claim 27 wherein the software tool enables the user to align cells with gaps in-between.

Assignments (10)
RELEASE OF SECURITY INTEREST Recorded Apr 15, 2022
From: CORTLAND CAPITAL MARKET SERVICES LLC
To: HILCO PATENT ACQUISITION 56, LLC; BELL SEMICONDUCTOR, LLC; BELL NORTHERN RESEARCH, LLC
Reel/Frame 059720/0223 →
SECURITY INTEREST Recorded Feb 1, 2018
From: HILCO PATENT ACQUISITION 56, LLC; BELL SEMICONDUCTOR, LLC; BELL NORTHERN RESEARCH, LLC
To: CORTLAND CAPITAL MARKET SERVICES LLC, AS COLLATERAL AGENT
Reel/Frame 045216/0020 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 17, 2017
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.; BROADCOM CORPORATION
To: BELL SEMICONDUCTOR, LLC
Reel/Frame 044887/0109 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041710/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037808/0001 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT RIGHTS (RELEASES RF 032856-0031) Recorded Feb 2, 2016
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: LSI CORPORATION; AGERE SYSTEMS LLC
Reel/Frame 037684/0039 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 20, 2015
From: LSI CORPORATION
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 035058/0248 →
CHANGE OF NAME Recorded Jun 6, 2014
From: LSI LOGIC CORPORATION
To: LSI CORPORATION
Reel/Frame 033102/0270 →
PATENT SECURITY AGREEMENT Recorded May 8, 2014
From: LSI CORPORATION; AGERE SYSTEMS LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 032856/0031 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 9, 2003
From: ALI, ANWAR; LAU, TAUMAN T.; DODDAPANENI, KALYAN
To: LSI LOGIC CORPORTION
Reel/Frame 014792/0145 →
Continuity (1)
Related Publication 20050125759A1 · Jun 9, 2005