IP Library Granted Patent US 7,049,893
Granted Patent B2
US 7,049,893 · App. 10/813,464 · Granted May 23, 2006

Apparatus, methods and articles of manufacture for power amplifier control in a communication system

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,049,893
App. No.
10/813,464
Granted
May 23, 2006
Kind
B2
Abstract

An apparatus and method for amplifying a radiofrequency (RF) signal. The apparatus comprises a control circuit including a first transistor, a second transistor, and a ballast resistor coupled between an emitter terminal of the first transistor and a base terminal of the second transistor, such that a control voltage applied to a base terminal of the first transistor controls the amplification of a signal applied to the base terminal of the second transistor. Additional elements may be coupled to the control circuit to improve the performance thereof, including a feedback stabilization circuit, a diode stack circuit, a bypass capacitor and an additional resistor.

Claims (72)

1. A circuit comprising:

a first transistor;

a second transistor;

a ballast resistor coupled between an emitter terminal of the first transistor and a base terminal of the second transistor; and,

a feedback stabilization circuit coupled to the first transistor,

wherein a control voltage applied to a base terminal of the first transistor controls the amplification of a signal applied to the base terminal of the second transistor.

2. The circuit of claim 1 , further comprising a biasing resistor coupled between a first input node and the base terminal of the first transistor.

3. A circuit comprising:

a first transistor;

a second transistor;

a ballast resistor coupled between an emitter terminal of the first transistor and a base terminal of the second transistor; and,

a feedback stabilization circuit coupled to the first transistor,

wherein a control voltage applied to a base terminal of the first transistor controls the amplification of a signal applied to the base terminal of the second transistor, and

wherein said feedback stabilization circuit includes at least one capacitor and at least one resistor.

4. The circuit of claim 1 , further comprising a diode stack circuit coupled to the first transistor, said diode stack circuit including at least two transistors.

5. The circuit of claim 4 , further comprising at least one bypass capacitor coupled to the at least two transistors.

6. The circuit of claim 1 , further comprising at least one bypass capacitor coupled to the first transistor.

7. The circuit of claim 1 , further comprising at least one additional resistor coupled between the emitter terminal of the first transistor and a base terminal of the first transistor.

8. A circuit comprising:

a first transistor;

a second transistor;

a ballast resistor coupled between an emitter terminal of the first transistor and a base terminal of the second transistor; and,

a diode stack circuit coupled to the first transistors,

wherein a control voltage applied to a base terminal of the first transistor controls the amplification of a signal applied to the base terminal of the second transistor, and

further comprising a feedback stabilization circuit, said feedback stabilization circuit including at least one capacitor and at least one resistor.

9. The circuit of claim 8 , further comprising a biasing resistor coupled between a first input node and the base terminal of the first transistor.

10. The circuit of claim 8 , wherein the diode stack circuit includes at least two transistors.

11. The circuit of claim 10 , further comprising at least one bypass capacitor coupled to the at least two transistors.

12. The circuit of claim 8 , further comprising at least one bypass capacitor coupled to the first transistor.

13. The circuit of claim 8 , further comprising at least one additional resistor coupled between the emitter terminal of the first transistor and a base terminal of the first transistor.

14. A circuit comprising:

a first transistor;

a second transistor;

a ballast resistor coupled between an emitter terminal of the first transistor and a base terminal of the second transistor; and,

at least one bypass capacitor coupled to a collector terminal of the first transistor,

wherein a control voltage applied to a base terminal of the first transistor controls the amplification of a signal applied to the base terminal of the second transistor and

further comprising a feedback stabilization circuit, said feedback stabilization circuit including at least one capacitor and at least one resistor.

15. The circuit of claim 14 , further comprising a biasing resistor coupled between a first input node and the base terminal of the first transistor.

16. The circuit of claim 14 , further comprising a diode stack circuit, wherein the diode stack circuit includes at least two transistors.

17. The circuit of claim 16 , further comprising at least one bypass capacitor coupled to the at least two transistors.

18. The circuit of claim 14 , further comprising at least one additional resistor coupled between the emitter terminal of the first transistor and a base terminal of the first transistor.

19. A circuit comprising:

a first transistor;

a second transistor;

a ballast resistor coupled between an emitter terminal of the first transistor and a base terminal of the second transistor; and,

at least one additional resistor coupled between the emitter terminal of the first transistor and a base terminal of the first transistors,

wherein a control voltage applied to a base terminal of the first transistor controls the amplification of a signal applied to the base terminal of the second transistor and

further comprising a feedback stabilization circuit, wherein said feedback stabilization circuit includes at least one capacitor and at least one resistor.

20. The circuit of claim 19 , further comprising a biasing resistor coupled between a first input node and the base terminal of the first transistor.

21. The circuit of claim 19 , further comprising a diode stack circuit coupled to the first transistor, said diode stack circuit including at least two transistors.

22. The circuit of claim 21 , further comprising at least one bypass capacitor coupled to the at least two transistors.

23. The circuit of claim 19 , further comprising at least one bypass capacitor coupled to the first transistor.

24. A method for amplifying a signal, comprising the steps of:

providing a control signal to a base terminal of a first transistor;

creating a bias voltage across a ballast resistor coupled to an emitter terminal of the first transistor;

providing feedback stabilization of the control signal; and,

applying the bias voltage to the base terminal of a second transistor to change the amplification of a signal also applied to the base terminal of the second transistor.

25. A method for amplifying a signal, comprising the steps of:

providing a control signal to a base terminal of a first transistor;

creating a bias voltage across a ballast resistor coupled to an emitter terminal of the first transistor;

providing a circuit to compensate for temperature variations; and,

applying the bias voltage to the base terminal of a second transistor to change the amplification of a signal also applied to the base terminal of the second transistor.

26. A method for amplifying a signal, comprising the steps of:

providing a control signal to a base terminal of a first transistor;

creating a bias voltage across a ballast resistor coupled to an emitter terminal of the first transistor;

providing at least one bypass capacitor coupled to a collector terminal of the first transistor to improve peak operating performance; and,

applying the bias voltage to the base terminal of a second transistor to change the amplification of a signal also applied to the base terminal of the second transistor.

27. A method for amplifying a signal, comprising the steps of:

providing a control signal to a base terminal of a first transistor;

creating a bias voltage across a ballast resistor coupled to an emitter terminal of the first transistor;

providing at least one resistor coupled between the base terminal and the emitter terminal of the first transistor to reduce the power control waveform slope; and,

applying the bias voltage to the base terminal of a second transistor to change the amplification of a signal also applied to the base terminal of the second transistor.

Assignments (13)
CHANGE OF NAME Recorded Jun 23, 2016
From: M/A-COM TECHNOLOGY SOLUTIONS HOLDINGS, INC.
To: MACOM TECHNOLOGY SOLUTIONS HOLDINGS, INC.
Reel/Frame 039139/0826 →
SECURITY INTEREST Recorded May 9, 2014
From: M/A-COM TECHNOLOGY SOLUTIONS HOLDINGS, INC.; MINDSPEED TECHNOLOGIES, INC.; BROOKTREE CORPORATION
To: GOLDMAN SACHS BANK USA
Reel/Frame 032859/0374 →
RELEASE OF SECURITY INTEREST Recorded May 8, 2014
From: JPMORGAN CHASE BANK, N.A.
To: M/A-COM TECHNOLOGY SOLUTIONS HOLDINGS, INC.
Reel/Frame 032857/0032 →
SECURITY AGREEMENT Recorded Sep 30, 2013
From: M/A-COM TECHNOLOGY SOLUTIONS HOLDINGS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 031314/0183 →
RELEASE OF SECURITY INTEREST RECORDED AT REEL/FRAME 25444/920 Recorded Oct 6, 2011
From: RBS BUSINESS CAPITAL, A DIVISION OF RBS ASSET FINANCE, INC., AS ADMINISTRATIVE AGENT
To: M/A-COM TECHNOLOGY SOLUTIONS HOLDINGS, INC.; MIMIX BROADBAND, INC.
Reel/Frame 027028/0021 →
SECURITY AGREEMENT Recorded Oct 4, 2011
From: M/A-COM TECHNOLOGY SOLUTIONS HOLDINGS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 027015/0444 →
RELEASE OF SECURITY INTEREST Recorded Dec 7, 2010
From: COBHAM DEFENSE ELECTRONIC SYSTEMS CORPORATION
To: M/A-COM TECHNOLOGY SOLUTIONS HOLDINGS, INC.
Reel/Frame 025445/0947 →
SECURITY AGREEMENT Recorded Dec 6, 2010
From: MIMIX BROADBAND, INC.; M/A-COM TECHNOLOGY SOLUTIONS HOLDINGS, INC.
To: RBS BUSINESS CAPITAL, A DIVISION OF RBS ASSET FINANCE, INC., AS AGENT
Reel/Frame 025444/0920 →
CHANGE OF NAME Recorded Nov 5, 2009
From: KIWI STONE ACQUISITION CORP.
To: M/A-COM TECHNOLOGY SOLUTIONS HOLDINGS, INC.
Reel/Frame 023476/0069 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 21, 2009
From: COBHAM DEFENSE ELECTRONIC SYSTEMS CORPORATION
To: KIWI STONE ACQUISITION CORPORATION
Reel/Frame 022714/0890 →
SECURITY AGREEMENT Recorded Apr 1, 2009
From: KIWI STONE ACQUISITION CORP.
To: COBHAM DEFENSE ELECTRONIC SYSTEMS CORPORATION
Reel/Frame 022482/0016 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 18, 2009
From: M/A COM, INC.; RAYCHEM INTERNATIONAL; TYCO ELECTRONICS CORPORATION; THE WHITAKER CORPORATION; TYCO ELECTRONICS LOGISTICS AG
To: COBHAM DEFENSE ELECTRONIC SYSTEMS CORPORATION
Reel/Frame 022266/0400 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 30, 2004
From: WINSLOW, THOMAS AARON
To: M/A-COM, INC.
Reel/Frame 015173/0908 →