IP Library Granted Patent US 7,057,462
Granted Patent B2
US 7,057,462 · App. 10/857,040 · Granted Jun 6, 2006

Temperature compensated on-chip bias circuit for linear RF HBT power amplifiers

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,057,462
App. No.
10/857,040
Filed
May 28, 2004
Granted
Jun 6, 2006
Kind
B2
Examiner
CHOE, HENRY
Art Unit
2817
USPC
330/289
Abstract

An RF amplifier is disclosed having a first and second current mirror module. The first and second current mirror modules each provide current to affect the quiescent bias current of the RF amplifier.

Claims (43)

1. A device comprising:

a radio frequency amplifier comprising a RF input, a bias node, and a RF output;

a first current mirror module comprising a first bias node coupled to the bias node;

a second current mirror module comprising a first bias node coupled to the first bias node of the first current mirror module; and

a mode control module comprising a first bias node coupled to a second bias node of the first current mirror module, and a second bias node coupled to a second bias node of the second current mirror module, and an input to receive a signal indicating one of a high power state and a low-power state.

2. The device of claim 1 , wherein the second current mirror module further comprises a single p-n junction current mirror.

3. The device of claim 2 , wherein the single p-n junction current mirror further comprises a transistor having a first current node, a second current node, and a control node coupled to the first current node.

4. The device of claim 3 , wherein the first current mirror comprises

a first transistor comprising a first current electrode, a second current electrode coupled to the first bias node of the first current mirror, and a control node;

a second transistor comprising a first current electrode coupled to the control node of the first transistor, a second current electrode, and a control electrode coupled to the second current electrode of the first transistor.

5. The device of claim 4 , wherein the second current electrode of the first transistor is connected to the first bias node.

6. The device of claim 5 wherein the second bias node of the of the first current module is coupled to the first current node of the second transistor.

7. The device of claim 5 wherein the second bias node of the of the second current module is coupled to the first current node of the transistor of the single rectifier.

8. The device of claim 7 wherein the mode control module further comprises a first transistor comprising a first current electrode coupled to the first bias node of the mode control module, a second current electrode, and a control node.

9. The device of claim 8 wherein the mode control module further comprises a second transistor comprising a first current electrode coupled to the second bias node of the mode control module, a second current electrode, and a control node coupled to the control node of the first transistor of the mode control module.

10. A method comprising the steps of:

facilitating generation of a first portion of a control node bias current at a first current source, where a slope of a quiescent current versus temperature attributed to the first portion of the control node bias current has a first polarity; and

facilitating generation a second portion of the control node bias current at a second current source, where a slope of a quiescent current versus temperature attributed to the second portion of the control node bias current has a second polarity opposite the first polarity.

11. The method of claim 10 further comprising:

selecting a mode of operation, wherein a magnitude of the node bias current is based upon the mode of operation.

12. A method comprising the steps of:

providing to a base of an RF amplifier, a first bias current to generate a collector current at the RF amplifier that varies by less than a first rate with respect to temperature when operating within a first temperature range; and

providing to the base of the RF amplifier, a second bias current to generate a collector current at the RF amplifier that varies by greater than a second rate with respect to temperature when operating within a second temperature range, a minimum value of the second rate with respect to the second temperature range being larger than a maximum value of the first temperature range.

13. The method of claim 12 , wherein a maximum temperature of the first 30 degree temperature range is less than 20 degrees Celsius.

14. The method of claim 13 , wherein a minimum temperature of the second 30 degree temperature range is greater than 20 degrees Celsius.

15. The method of claim 14 , wherein the first rate with respect to temperature is 1 milliamp per 7 degrees Celsius.

16. The method of claim 12 , wherein the first rate with respect to temperature is 1 milliamp per 7 degrees Celsius.

17. The method of claim 12 , wherein a minimum temperature of the second 30 degree temperature range is greater than 20 degrees Celsius.

18. The method of claim 12 further comprising:

providing a mode indicator, wherein a magnitude of the first bias current and a magnitude of the second bias current are based on the mode indicator.

19. A device comprising:

an input matching module comprising a first input node to receive an RF signal, and an output;

a first stage power amplifier comprising:

a radio frequency amplifier comprising a RF input, a bias node coupled to the output of the input matching module, and a RF output;

a first current mirror module comprising a first bias node coupled to the bias node; and

a second current mirror module comprising a first bias node coupled to the first bias node of the first current mirror module;

an interstage matching module comprising an input coupled to the RF output of the first stage amplifier, and an output; and

a second stage power amplifier comprising:

a radio frequency amplifier comprising a RF input, a bias node coupled to the output of the interstage matching module, and a RF output;

a first current mirror module comprising a first bias node coupled to the bias node; and

a second current mirror module comprising a fast bias node coupled to the first bias node of the first current mirror module.

20. The device of claim 19 , wherein the device is an RF base station transceiver further comprising a system control module coupled to the first and second stage power amplifiers.

21. The device of claim 19 , wherein the device is an RF mobile transceiver further comprising a system control module coupled to the fast and second stage power amplifiers.

Assignments (28)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 037486 FRAME 0517. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Dec 10, 2019
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 053547/0421 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051030/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042985 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0387 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042762 FRAME 0145. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051145/0184 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050745/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →
CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: SHENZHEN XINGUODU TECHNOLOGY CO., LTD.
Reel/Frame 048734/0001 →
RELEASE OF SECURITY INTEREST Recorded May 29, 2017
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP USA, INC. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 042610/0451 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042985/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042762/0145 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 29, 2017
From: NXP USA, INC.
To: VLSI TECHNOLOGY LLC
Reel/Frame 042374/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENTS 8108266 AND 8062324 AND REPLACE THEM WITH 6108266 AND 8060324 PREVIOUSLY RECORDED ON REEL 037518 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 1, 2017
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 041703/0536 →
CORRECTIVE ASSIGNMENT TO CORRECT THE NATURE OF CONVEYANCE LISTED CHANGE OF NAME SHOULD BE MERGER AND CHANGE PREVIOUSLY RECORDED AT REEL: 040652 FRAME: 0180. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER AND CHANGE OF NAME. Recorded Jan 12, 2017
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 041354/0148 →
CHANGE OF NAME Recorded Nov 8, 2016
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 040652/0180 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12092129 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Jul 14, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039361/0212 →
SUPPLEMENT TO THE SECURITY AGREEMENT Recorded Jun 16, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039138/0001 →
SECURITY AGREEMENT SUPPLEMENT Recorded Mar 7, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 038017/0058 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 13, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037518/0292 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 12, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037486/0517 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0553 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037354/0225 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0143 →
SECURITY AGREEMENT Recorded Nov 6, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 031591/0266 →