Boosted switch drive with charge transfer
View Patent ↗A switch drive circuit utilizes charge transfer within and/or between boost circuit and/or snubber circuits for boosted switch drives. A boost circuit may include a divider to limit a boosted signal for driving a switch. A snubber circuit may transfer charge to a boost circuit.
1. A switching power supply control circuit comprising:
a switch node configured for being coupled between two series coupled switches;
a drive node configured for supplying a drive signal to drive a first switch of the two series coupled switches;
a driver circuit configured to provide a drive signal to operably drive the first switch;
a boost node operably coupled to provide power to the driver circuit;
a power source node; and
a boost circuit coupled to the switch node and the power source node to generate a boosted signal for providing a power source to the driver circuit for driving the first switch, wherein the boost circuit comprises a divider to limit the boosted signal;
wherein the divider comprises:
a first capacitor coupled between the boost node and a power supply node; and
a second capacitor coupled between the boost node and the switch node.
2. The circuit of claim 1 wherein the divider further comprises a resistor coupled in series with one of the capacitors.
3. The circuit of claim 1 wherein the divider further comprises:
a boot-strap diode coupled between the power source node and the boost node; and
a resistor coupled in series with the boot-strap diode to limit current surges through the boot-strap diode.
4. A switching power supply control circuit comprising:
a switch node configured for being coupled between two series coupled switches;
a drive node configured for supplying a drive signal to drive a switch of the two series coupled switches;
a driver circuit configured to provide a drive signal to operably drive the switch;
a snubber circuit coupled to the switch node; and
a boost circuit coupled to the switch node to generate a boosted signal for providing power to the driver circuit for driving the switch;
wherein the snubber circuit is arranged to transfer charge from the switch node to the boost circuit and limit a value of the boosted signal; and
wherein the snubber circuit comprises a capacitor and a resistor coupled between the switch node and the boost circuit.
5. The circuit of claim 4 wherein the capacitor and resistor are coupled to a boost node in the boost circuit.
6. The circuit of claim 5 wherein the capacitor and resistor are coupled in series.
7. The circuit of claim 5 wherein the boost circuit comprises a second capacitor coupled between the boost node and a power supply terminal.
8. A method for controlling a switching power supply comprising:
configuring a driver circuit to form a drive signal to drive a switch coupled to a switch node and a drive node wherein the switch node is between two series coupled switches;
generating a boosted signal wherein the driver circuit receives the boosted signal as a power source for operating the driver circuit; and
transferring charge between two charge storage elements that are coupled to the driver circuit to reduce the voltage of the boosted signal.
9. The method of claim 8 wherein transferring charge comprises transferring charge between two capacitors.
10. The method of claim 8 wherein transferring charge comprises dividing a voltage.
11. The method of claim 8 further comprising transferring charge from the switch node to the drive node.
12. The method of claim 11 wherein transferring charge from the switch node to the drive node comprises transferring charge through a capacitor.
13. The method of claim 12 wherein transferring charge from the switch node to the drive node further comprises transferring charge through a resistor.
14. A switching power supply control circuit comprising:
a switch node configured for being coupled between two series coupled switches;
a drive node configured for supplying a drive signal to drive a first switch of the two series coupled switches;
a driver circuit configured to provide the drive signal to the drive node;
a boost node operably coupled to provide power to the driver circuit;
a power source node; and
a boost circuit coupled to the switch node and the power source node to generate a boosted signal for driving the switch, wherein the boost circuit comprises a charge divider to limit the boosted signal.
15. The circuit of claim 14 wherein the charge divider comprises a capacitor coupled between the boost node and a power supply node.
16. The circuit of claim 14 wherein the charge divider comprises a capacitor coupled between a boost node and the switch node.
17. The circuit of claim 14 wherein at least a portion of the divider is integral with a snubber circuit.
18. The circuit of claim 14 wherein the power source node is an input power source node.
19. A switching power supply control circuit comprising:
a switch node configured for being coupled between two series coupled switches;
a drive node configured for supplying a drive signal to drive a first switch of the two series coupled switches;
a driver circuit configured to provide a drive signal to operably drive the first switch;
a snubber circuit coupled to the switch node; and
a boost circuit coupled to the switch node to generate a boosted signal for operating the driver circuit;
wherein the snubber circuit is arranged to transfer charge from the switch node to the boost circuit.
20. The circuit of claim 19 wherein the snubber circuit is coupled in a feedback arrangement with the drive node.
21. A switching power supply control circuit comprising:
a switch node configured for being coupled between two series coupled switches;
a drive node configured for supplying a drive signal to drive a first switch of the two series coupled switches;
a driver circuit configured to provide a drive signal to operably drive the first switch;
a power source node;
means for generating a boosted signal for driving the switch; and
charge sharing means coupled to the means for generating the boosted signal for limiting the boosted signal.
22. The circuit of claim 21 further comprising means for snubbing the switch node.
23. The circuit of claim 22 wherein the means for snubbing the switch node is integral with the charge sharing means.