Integrated semiconductor inductor and method therefor
View Patent ↗In one embodiment, a multi-layer inductor is formed overlying a semiconductor substrate.
1. An integrated semiconductor inductor comprising:
a semiconductor substrate;
a first multilayer inductor overlying at least a portion of the semiconductor substrate, the first multilayer inductor having a first terminal and a second terminal, the first multilayer inductor also having a first conductor overlying the portion of the semiconductor substrate, a second conductor overlying at least a portion of the first conductor, a first dielectric disposed between the first conductor and the second conductor wherein the first conductor is connected to the first terminal of the first multilayer inductor and the second conductor is connected to the second terminal of the first multilayer inductor; and
a first connection extending through the first dielectric to form electrical contact between the first conductor and the second conductor.
2. The integrated semiconductor inductor of claim 1 wherein the first multilayer inductor has a resistivity no greater than about five micro ohm-cm.
3. The integrated semiconductor inductor of claim 1 wherein a portion of the first multilayer inductor encloses the first connection.
4. The integrated semiconductor inductor of claim 1 wherein the first conductor and the second conductor are metal conductors.
5. The integrated semiconductor inductor of claim 1 further including a first capacitor coupled in parallel with the first multilayer inductor, the first capacitor having a first terminal and a second terminal with the first terminal of the first capacitor coupled to the first terminal of the first multilayer inductor and the second terminal of the first capacitor coupled to the second terminal of the first multilayer inductor.
6. The integrated semiconductor inductor of claim 5 further including a second capacitor having a first terminal coupled to the second terminal of the first multilayer inductor wherein the second capacitor is a transient voltage suppressor.
7. The integrated semiconductor inductor of claim 1 further including a second dielectric overlying the second conductor.
8. The integrated semiconductor inductor of claim 1 further including a second multilayer inductor coupled to the first multilayer inductor.
9. A method of forming an integrated semiconductor inductor comprising:
providing a semiconductor substrate;
forming a first inductor element overlying at least a portion of the semiconductor substrate;
forming a second inductor element overlying at least a portion of the first inductor element wherein the first inductor element is magnetically coupled to the second inductor element and wherein the first inductor element and the second inductor element extend in opposite directions; and
coupling a capacitor in parallel with the first inductor element and the second inductor element.
10. The method of claim 9 wherein forming the second inductor element includes electrically connecting the first inductor element to the second inductor element.
11. The method of claim 9 wherein forming the first inductor element includes forming a first conductor overlying the portion of the semiconductor substrate and forming a first dielectric on at least a portion of a first surface of the first conductor.
12. The method of claim 11 wherein forming the second inductor element includes forming a second conductor on at least a portion of a first surface of the first dielectric and overlying the portion of the first inductor element.
13. An integrated semiconductor filter comprising:
a first multilayer inductor overlying a first portion of a surface of a semiconductor substrate, the first multilayer inductor including a first inductor element extending in a first direction overlying the semiconductor substrate and a second inductor element extending in a different direction overlying the first inductor element wherein an interior terminal end of the first inductor element is connected to an interior terminal end of the second inductor element;
a first capacitor coupled in series with the first inductor; and
a second inductor coupled in series with the first inductor.
14. The integrated semiconductor filter of claim 13 further including a second capacitor coupled in a shunt configuration with the first inductor.
15. The integrated semiconductor filter of claim 14 wherein the second capacitor is a TVS device.
16. The integrated semiconductor filter of claim 13 further including a first dielectric disposed between the fist inductor element and the second inductor element and a second dielectric overlying the second inductor element.