IP Library Granted Patent US 7,692,469
Granted Patent B2
US 7,692,469 · App. 11/105,255 · Granted Apr 6, 2010

Voltage sense circuit and method therefor

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Quick Facts
Patent No.
US 7,692,469
App. No.
11/105,255
Granted
Apr 6, 2010
Kind
B2
Abstract

In one embodiment, a voltage sense circuit receives an ac input signal and forms a rectified output voltage that is representative of the ac input signal.

Claims (43)

1. A voltage sense circuit comprising:

a voltage input terminal;

a voltage return terminal;

a first input and a second input coupled to receive an ac input signal;

a first current mirror coupled to the first input to convert the ac input signal to a first current that is representative of the ac input signal, the first current mirror including a first transistor having a first current carrying electrode and a control electrode coupled to the first input, and a second current carrying electrode coupled to the voltage return terminal and the first current mirror also including a second transistor having a first current carrying electrode coupled to the second current carrying electrode of the first transistor, a control electrode coupled to the control electrode of the first transistor, and a second current carrying electrode;

a second current mirror coupled to the second input to convert the ac input signal to a second current that is representative of the ac input signal;

a summing node coupled to sum the first current with the second current and form a third current;

a rectifier coupled to receive the third current and form a rectified current that is representative of the ac input signal; and

an output of the voltage sense circuit configured to convert the rectified current to a rectified voltage that is representative of the ac input signal.

2. The voltage sense circuit of claim 1 further including a third transistor having a first current carrying electrode coupled to the first input, a control electrode, and a second current carrying electrode.

3. The voltage sense circuit of claim 2 further including a fourth transistor having a first current carrying electrode coupled to the summing node and to the second current carrying electrode of the second transistor, a control electrode, and a second current carrying electrode coupled to the voltage input terminal; and

a fifth transistor having a first current carrying electrode coupled to the second current carrying electrode of the fourth transistor, a control electrode and a second current carrying electrode commonly coupled to the control electrode of the fourth transistor and to the second current carrying electrode of the third transistor.

4. The voltage sense circuit of claim 1 wherein the second current mirror coupled to the second input includes a sixth transistor having a first current carrying electrode coupled to the voltage return terminal, a second current carrying electrode and a base electrode connected to the second input;

a seventh transistor having a first current carrying electrode coupled to the first current carrying electrode of the sixth transistor, a control electrode coupled to the control electrode of the sixth transistor, and a second current carrying electrode;

an eighth transistor having a first current carrying electrode connected to the second input, a control electrode coupled to a first voltage reference, and a second current carrying electrode coupled to the summing node;

a ninth transistor having a first current carrying electrode coupled to the summing node, a second current carrying electrode coupled to the voltage input terminal, and a control electrode; and

a tenth transistor having a first current carrying electrode coupled to the voltage input terminal, and a second current carrying electrode commonly coupled to a control electrode of the tenth transistor, a control electrode of the ninth transistor, and the second current carrying electrode of the seventh transistor.

5. The voltage sense circuit of claim 1 wherein the rectifier includes a first rectifier transistor having a first current carrying electrode, a control electrode, and also including a second current carrying electrode coupled to the output; and

a second rectifier transistor having a first current carrying electrode coupled to the first current carrying electrode of the first rectifier transistor, and a control electrode coupled to the control electrode of the first rectifier transistor.

6. A method of forming a voltage sense circuit comprising:

configuring a first input to form a first current that is representative of an ac input signal, including configuring the voltage sense circuit to clamp the first input to a first voltage to form the first current;

configuring the voltage sense circuit to convert the first current to a second current that is representative of the first current;

configuring a second input to form a third current that is representative of the ac input signal;

configuring the voltage sense circuit to convert the third current to a fourth current that is representative of the third current; and

configuring the voltage sense circuit to sum the second current and the fourth current as a fifth current and couple the fifth current for conversion to a rectified output voltage having a value that is representative of a value of the ac input signal.

7. The method of claim 6 further including configuring the voltage sense circuit to rectify the fifth current to form a sixth current and to couple the sixth current for conversion to the rectified output voltage.

8. The method of claim 6 wherein configuring the second input to form the third current that is representative of an ac input signal includes configuring the voltage sense circuit to clamp the second input to a second voltage that is substantially the same as the first voltage.

9. The method of claim 6 further including configuring the voltage sense circuit to use the fifth current to form a zero crossing signal that is representative of a zero crossing of the ac input signal, and couple the fifth current for conversion to a rectified output voltage having a value that is representative of a value of the ac input signal.

10. The method of claim 9 wherein configuring the voltage sense circuit to use the fifth current to form the zero crossing signal that is representative of the zero crossing of the ac input signal includes configuring the voltage sense circuit convert the fifth current to a first detection voltage for a first direction of the fifth current and to convert the fifth current to a second detection voltage for a second direction of the fifth current that is opposite to the first direction wherein the second detection voltage is less than the first detection voltage.

11. The method of claim 6 wherein configuring the voltage sense circuit to convert the first current to the second current includes coupling a first current mirror to receive the first current and form the second current.

12. The method of claim 11 wherein configuring the voltage sense circuit to convert the third current to the fourth current includes coupling a second current mirror to receive the first current and form the second current.

13. A voltage sense method comprising:

coupling an ac input signal to a first input and a second input of a voltage sense circuit;

clamping the first input to a first voltage to convert the ac input signal to a first current;

clamping the second input to a second voltage to convert the ac input signal to a second current;

summing the first current and the second current to form a third current that is representative of the ac input signal;

converting the third current to a fourth current having a haversine waveform that is representative of the ac input signal;

converting the fourth current to a haversine voltage that is representative of the ac input signal; and

clamping the first input to a third voltage to convert the ac input signal to a fifth current that is representative of the ac input signal.

14. The method of claim 13 further including using the third current to form a zero crossing signal that is representative of a zero crossing of the ac input signal.

15. The method of claim 14 wherein using the third current to form the zero crossing signal that is representative of a zero crossing of the ac input signal includes converting a first direction of the third current to a first detection voltage and converting a second direction of the third current to a second detection voltage that is less than the first detection voltage.

16. The method of claim 13 further including clamping the second input to a fourth voltage to convert the ac input signal to a sixth current that is representative of the ac input signal and summing the fifth current and the sixth current to form the third current.

17. The voltage sense circuit of claim 1 wherein the first current mirror is configured to clamp the first input to a first voltage and wherein the second current mirror is configured to clamp the second input to a second voltage.

Assignments (6)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 038620, FRAME 0087 Recorded Jun 22, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064070/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT PATENT NUMBER 5859768 AND TO RECITE COLLATERAL AGENT ROLE OF RECEIVING PARTY IN THE SECURITY INTEREST PREVIOUSLY RECORDED ON REEL 038620 FRAME 0087. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Aug 25, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 039853/0001 →
SECURITY INTEREST Recorded Apr 15, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH
Reel/Frame 038620/0087 →
RELEASE OF SECURITY INTEREST Recorded Sep 4, 2014
From: JPMORGAN CHASE BANK, N.A.
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 033686/0092 →
SECURITY AGREEMENT Recorded Sep 10, 2007
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 019795/0808 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 14, 2005
From: KADANKA, PETR
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, L.L.C.
Reel/Frame 016473/0362 →