Fixed offset digital-to-analog conversion device and method
View Patent ↗I describe and claim an improved digital-to-analog conversion device and method. The device comprises a current supply circuit to generate a plurality of control currents responsive to a plurality of digital signals. An input voltage generating circuit is adapted to generate a plurality of input voltages responsive to the digital signals and the control currents. And a plurality of operational amplifiers is adapted to output a plurality of analog signals responsive to the input voltages.
1. A device comprising:
a current supply circuit to generate a plurality of control currents responsive to a corresponding plurality of digital signals;
an input voltage generating circuit to generate a plurality of input voltages responsive to the plurality of digital signals and control currents, the current supply circuit providing the control currents to the input voltage generating circuit, where the diaital signals identify both the magnitudes of the control currents and the voltage levels of the input voltages; and
a plurality of operational amplifiers to output a plurality of analog signals responsive to the plurality of input voltages.
2. The device of claim 1 comprising a bias circuit to provide a bias voltage to the input voltage generating circuit and the current supply circuit.
3. The device of claim 2 where the current supply circuit is adapted to generate control currents responsive to the bias voltage and the digital signals.
4. The device of claim 2 where the input voltage generating circuit is adapted to generate input voltages responsive to the digital signals, the control currents, and the bias voltage.
5. The device of claim 1 where the input voltage generating circuit comprises a plurality of voltage generating circuits, each voltage generating circuit to adjust the magnitude of at least one of the input voltages responsive to the control currents and the digital signals.
6. The device of claim 5 where each voltage generating circuit is a differential amplifier including NMOS transistors.
7. The device of claim 1 where the current supply circuit includes:
a reference current source circuit to generate a reference current; and
a plurality of currentsource circuits, each current source circuit to adjust a magnitude of at least one of the control currents by a magnitude of the reference current responsive to the digital signals.
8. The device of claim 7 where each current source circuit is a differential amplifier including PMOS transistors.
9. The device of claim 7 where each current source circuit forms a current mirror with the reference current source circuit.
10. The device of claim 1
where each operational amplifier is adapted to provide an additional current to the input voltage generating circuit; and
where the input voltage generating circuit is adapted to generate the input voltages responsive to the digital signals, the control currents, and the additional currents.
11. The device of claim 10 where magnitudes of the additional currents are smaller than magnitudes of the control currents.
12. The device of claim 10
where the additional currents are combined with the corresponding control currents; and
where the input voltage generating circuit is adapted to generate the input voltages responsive to the digital signals, and the combination of the control currents and the additional currents.
13. The device of claim 1 where the plurality of operational amplifiers outputs the analog signals responsive to the input voltages and a reference voltage.
14. The device of claim 1 where a voltage offset between the analog signals remains substantially fixed responsive to changes in the plurality of digital signals.
15. A device comprising:
a current supply circuit to generate a first control current responsive to a first digital signal, and a second control current responsive to a second digital signal;
an input voltage generating circuit to generate a first input voltage responsive to the first digital signal and the first control current, and a second input voltage responsive to the second digital signal and the second control current;
a first operational amplifier to output a first analog signal responsive to the first input voltage; and
a second operational amplifier to output a second analog signal responsive to the second input voltage, where a voltage offset between the first and second analog signals remains substantially fixed responsive to chances in the first and second digital signals.
16. The device of claim 15 where the first and second digital signals are complementary.
17. The device of claim 15 where the input voltage generating circuit includes a plurality of voltage generating circuits, each voltage generating circuit to adjust the magnitude of the first input voltage responsive to the first control current and the first digital signal and to adjust the magnitude of the second input voltage responsive to the second control current and the second digital signal.
18. The device of claim 15 where the current supply circuit includes:
a reference current source circuit to generate a reference current; and
a plurality of current source circuits, each current source circuit to adjust a magnitude of the first control current by a magnitude of the reference current responsive to the first digital signal and to adjust a magnitude of the second control current by a magnitude of the reference current responsive to the second digital signal.
19. The device of claim 15
where the first operational amplifier provides a first additional current to the input voltage generating circuit;
where the second operational amplifier provides a second additional current to the input voltage generating circuit;
where the input voltage generating circuit generates the first input voltage responsive to the first digital signal, the first control current, and the first additional current; and
where the input voltage generating circuit generates the second input voltage responsive to the second digital signal, the second control current, and the second additional current.
20. A method comprising:
generating a plurality of control currents responsive to a plurality of digital signals;
generating a plurality of additional currents;
combining the control currents with a plurality of additional currents;
generating a plurality of input voltages responsive to the digital signals and the combination of the control currents and the additional currents; and
outputting a plurality of analog signals responsive to the input voltages.
21. The method of claim 20 comprising generating a bias voltage responsive to a control signal.
22. The method of claim 21 where generating the control currents occurs responsive to the bias voltage and the digital signals.
23. The method of claim 21 where generating the input voltages occurs responsive to the digital signals, the control currents, and the bias voltage.
24. The method of claim 20 where outputting the plurality of analog signals occurs responsive to the input voltages and a reference voltage.