Method of forming a semiconductor device and structure therefor

1. A method of forming a semiconductor device comprising:

providing a substrate of a first semiconductor material of a first conductivity type;

forming a first region of a second conductivity type on a surface of the substrate;

forming a first opening extending from a surface of the first region a first distance into the substrate and surrounding a first portion of the first region;

forming a second semiconductor material of the first conductivity type within the first opening to form a first isolation trench wherein the second semiconductor material has a substantially constant doping concentration through a depth of the first isolation trench and wherein a portion of the second semiconductor material forms a P-N junction with a portion of the first region;

forming a first electrical device on the first portion of the first region; and

forming a second electrical device on a second portion of the first region that is external to the first portion of the first region.

2. The method of claim 1 wherein forming the first electrical device includes forming a device that is one of a MOS transistor, a bipolar transistor, a diode, a capacitor, or a resistor.

3. The method of claim 1 wherein forming the second electrical device includes forming a device that is one of a MOS transistor, a bipolar transistor, a diode, a capacitor, or a resistor.

4. The method of claim 1 wherein forming the second semiconductor material of the first conductivity type includes forming doped polysilicon within the first opening wherein a portion of the doped polysilicon forms the P-N junction with the first region.

5. The method of claim 4 wherein forming the first opening extending from the surface of the substrate the first distance into the first region includes forming the first opening having a width that is no greater than approximately 1.5 microns and a depth that is at least approximately three times the width.

6. The method of claim 1 wherein providing the substrate of the first semiconductor material of the first conductivity type includes providing a bulk semiconductor substrate of the first conductivity type, forming a first buried layer region of the second conductivity type on a surface of the bulk semiconductor substrate and underlying the first portion of the first region, and forming an epitaxial layer of the second conductivity type overlying the first buried layer region.

7. The method of claim 1 wherein forming the second semiconductor material of the first conductivity type includes forming a field isolation region on a surface of the substrate, forming the first opening through The field isolation region and into The substrate, and forming the second semiconductor material within the first opening.

8. The method of claim 1 further including surrounding a third portion of the first region with a second isolation trench filled with the second semiconductor material of the first conductivity type including forming the third portion external to the first portion of the first region and forming at least a portion of a bipolar transistor on the third portion of the first region and forming at least a portion of a first MOS transistor as the first electrical device.

9. The method of claim 8 further including forming a buried layer region of the second conductivity type on a surface of the substrate and underlying the third portion of the first region and forming an epitaxial layer on the surface of the substrate covering the buried layer region.

10. The method of claim 8 wherein forming the portion of the bipolar transistor in the third portion of the first region includes forming the portion of the bipolar transistor at temperatures below an activation temperature of dopants used to form the portion of the bipolar transistor and subsequently activating the dopants used to form the portion of the bipolar transistor and activating dopants used to form the first MOS transistor that is formed in the first region.

11. The method of claim 8 wherein forming the portion of the bipolar transistor on the third portion of the first region includes forming a protective layer on the substrate overlying an active region of the portion of the bipolar transistor and an active region of the first MOS transistor subsequent to forming the active region of the first MOS transistor, forming the first opening through the protective layer and exposing a portion of the first region wherein the first opening overlies the portion of the bipolar transistor and leaving the protective layer overlying the active region of the first MOS transistor.

12. The method of claim 8 wherein surrounding the third portion of the first region with the second isolation trench filled with the second semiconductor material includes forming a second opening extending from the surface of the first region a distance into the substrate and forming doped polysilicon within the opening wherein a portion of the doped polysilicon forms another P-N junction with the first region.

13. The method of claim 1 wherein forming the second semiconductor material of the first conductivity type includes forming the second semiconductor material having a substantially doping concentration of no less than about 1E18 to 1E21 atoms/cm 3 .

14. A method of forming a semiconductor device comprising:

providing a substrate of a first semiconductor material of a first conductivity type;

forming a first region of a second conductivity type that is opposite to the first conductivity type on a surface of the substrate;

surrounding a first portion of the first region with a first isolation trench filled with a second semiconductor material of the first conductivity type including forming the trench extending through a portion of a field isolation region and extending a first distance into the substrate wherein at least a portion of the second semiconductor material forms a P-N junction with a portion of the first region;

forming at least a portion of a first bipolar transistor in the first portion of the first region;

forming at least a portion of a first MOP transistor in a second portion of the first region that is external to the first portion of the first region;

forming a protective layer on the first region overlying an active region of the portion of the first bipolar transistor and an active region of the first MOP transistor subsequent to forming the active region of the first MOS transistor; and

forming a first opening through the protective layer and exposing a portion of the first region wherein the first opening overlies the portion of the first bipolar transistor and leaving the protective layer overlying an active region of the first MOS transistor.

15. The method of claim 14 wherein surrounding the first portion of the first region with the first isolation trench filled with the second semiconductor material of the first conductivity type includes forming the second semiconductor material having a substantially constant doping concentration of about 1E18 to 1E21 atoms/cm 3 .

16. The method of claim 14 wherein forming at least the portion of the first MOS transistor in the second portion of the first region includes surrounding the second portion of the first region with a second isolation trench filled with the second semiconductor material and further includes forming at least a portion of a second MOS transistor in a third portion of the first region that is external to both the first portion of the first region and the second portion of the first region.

17. A method of forming a semiconductor device comprising:

providing a substrate of a first semiconductor material of a first conductivity type;

forming a field isolation region on a surface of a first portion of the substrate;

surrounding the first portion of the substrate with a first isolation trench filled with a second semiconductor material of a second conductivity type that is opposite to the first conductivity type including forming an opening through the field isolation region and forming the trench within a portion of the opening and extending through a portion of the field isolation region and extending a first distance into the substrate wherein at least a portion of the second semiconductor material forms a P-N junction with a portion of the substrate;

forming at least a portion of a first MOS transistor in the first portion of the substrate; and

forming a first electrical device in a second portion of the substrate that is external to the first portion of the substrate.

18. The method of claim 17 wherein forming at least a portion of a first electrical device includes forming the first electrical device that is one of a MOS transistor, a bipolar transistor, a diode, a capacitor, or a resistor.

19. The method of claim 17 wherein providing the substrate includes providing a bulk semiconductor substrate, forming a first buried layer region of the first conductivity type on a surface of the bulk semiconductor substrate and within the first portion of the substrate, and forming an epitaxial layer overlying the first buried layer region and within the first portion of the substrate.

20. The method of claim 19 further including surrounding a third portion of the substrate with a second isolation trench filled with the second semiconductor material of the second conductivity type including forming the second isolation trench extending the first distance into the substrate wherein at least a portion of the second semiconductor material forms a P-N junction with a portion of the substrate.

21. The method of claim 20 further including forming a bipolar transistor in the third portion of the substrate.

22. The method of claim 17 wherein surrounding the first portion of the substrate with the first isolation trench filled with the second semiconductor material of the second conductivity type that is opposite to the first conductivity type includes forming doped polysilicon within the opening.

23. The method of claim 17 further including forming a plurality of MOS transistors in the first portion of the substrate.

24. A method of forming a semiconductor device comprising:

providing a semiconductor substrate of a first conductivity type;

forming a first region of a second conductivity type that is opposite to the first conductivity type on a surface of the semiconductor substrate; etching an opening in the first region and the semiconductor substrate; and forming an isolation trench by filling the opening with a semiconductor material of the first conductivity type wherein the semiconductor material within the isolation trench forms a P-N junction with the first region for isolating a first electrical device from current flow through the first region to a second electrical device.

25. The method of claim 24 wherein forming the isolation trench includes surrounding a first portion of the first region with a first isolation trench filled with the semiconductor material of the first conductivity type and forming the first electrical device on the first portion of the first region.

26. The method of claim 25 further including forming the second electrical device on a second portion of the semiconductor substrate that is external to the first portion of the first region.

27. The method of claim 24 wherein forming the isolation trench having semiconductor material of the first conductivity type within the isolation trench for isolating the first electrical device from current flow includes forming the first electrical device as one of an MOS device, a bipolar device, a diode, a capacitor, or a resistor.