IP Library Granted Patent US 7,220,639
Granted Patent B2
US 7,220,639 · App. 11/121,360 · Granted May 22, 2007

Method for fabricating a MIM capacitor high-K dielectric for increased capacitance density and related structure

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Quick Facts
Patent No.
US 7,220,639
App. No.
11/121,360
Granted
May 22, 2007
Kind
B2
Abstract

According to one embodiment of the invention, a method for fabricating a MIM capacitor in a semiconductor die includes a step of depositing a first interconnect metal layer. The method further includes depositing a high-k dielectric layer comprising AlN X (aluminum nitride) on the first interconnect layer. The method further includes depositing a layer of MIM capacitor metal on the high-k dielectric layer. The method further includes etching the layer of MIM capacitor metal to form an upper electrode of the MIM capacitor. According to this exemplary embodiment, the first interconnect metal layer, the high-k dielectric layer, and the layer of MIM capacitor metal can be deposited in a PVD process chamber. The method further includes etching the high-k dielectric layer to form a MIM capacitor dielectric segment and etching the first interconnect metal layer to form a lower electrode of the MIM capacitor.

Claims (28)

1. A method for fabricating a MIM capacitor in a semiconductor die, said method comprising steps of:

depositing a first interconnect metal layer;

depositing a high-k dielectric layer on said first interconnect metal layer;

depositing a layer of MIM capacitor metal on said high-k dielectric layer;

etching said layer of MIM capacitor metal to form an upper electrode of said MIM capacitor;

wherein said high-k dielectric layer comprises AlN x , wherein said first interconnect metal layer, said high-k dielectric layer, and said layer of MIM capacitor metal are deposited in a single PVD process chamber without breaking vacuum.

2. The method of claim 1 further comprising steps of:

etching said high-k dielectric layer to form a MIM capacitor high-k dielectric segment;

etching said first interconnect metal layer to form a lower electrode of said MIM capacitor.

3. The method of claim 1 wherein said AlN x is selected from the group consisting of AlN and AlN 2 .

4. The method of claim 1 wherein said high-k dielectric layer has a thickness of between approximately 200.0 Angstroms and approximately 350.0 Angstrorns.

5. The method of claim 1 further comprising steps of:

depositing an interlayer dielectric layer over said upper electrode of said MIM capacitor;

depositing a second interconnect metal layer on said interlayer dielectric layer.

6. A method for fabricating a MIM capacitor in a semiconductor die, said method comprising steps of:

depositing a first interconnect metal layer;

depositing a high-k dielectric layer on said first interconnect metal layer;

depositing a layer of MIM capacitor metal on said high-k dielectric layer;

etching said layer of MIM capacitor metal to form a first metal plate, said first metal plate forming an upper electrode of said MIM capacitor;

etching said high-k dielectric layer to form a MIM capacitor high-k dielectric segment;

etching said first interconnect metal layer to form a second metal plate, said second metal plate forming a lower electrode of said MIM capacitor;

wherein said MIM capacitor high-k dielectric segment is selected from the group consisting of AlN and AlN 2 , wherein said first interconnect metal layer, said high-k dielectric layer, and said layer of MIM capacitor metal are deposited in a single PVD process chamber without breaking vacuum.

7. The method of claim 6 wherein said MIM capacitor high-k dielectric segment has a thickness of between approximately 200.0 Angstroms and approximately 350.0 Angstroms.

8. The method of claim 6 wherein said MIM capacitor high-k dielectric segment has a dielectric constant of at least 10.0.

9. The method of claim 6 further comprising steps of:

depositing an interlayer dielectric layer over upper electrode of said MIM capacitor;

depositing a second interconnect metal layer on said interlayer dielectric layer.

10. The method of claim 6 wherein a concentration of nitrogen in said MIM capacitor high-k dielectric segment determines a dielectric constant of said MIM capacitor high-k dielectric segment.

Assignments (5)
RELEASE OF SECURITY INTEREST Recorded Oct 18, 2023
From: WELLS FARGO CAPITAL FINANCE, LLC, AS SUCCESSOR BY MERGER TO WACHOVIA CAPITAL FINANCE CORPORATION (WESTERN)
To: NEWPORT FAB, LLC DBA JAZZ SEMICONDUCTOR OPERATING COMPANY
Reel/Frame 065284/0123 →
RELEASE OF SECURITY INTEREST Recorded Jul 20, 2012
From: WELLS FARGO CAPITAL FINANCE, LLC
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 028597/0870 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 19, 2011
From: NEWPORT FAB, LLC D/B/A JAZZ SEMICONDUCTOR, A TOWER GROUP COMPANY
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 026926/0812 →
FIRST AMENDMENT TO PATENT SECURITY AGREEMENT Recorded Apr 4, 2007
From: NEWPORT FAB, LLC
To: WACHOVIA CAPITAL FINANCE CORPORATION (WESTERN)
Reel/Frame 019111/0295 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 3, 2005
From: ABDUL-RIDHA, HADI; HOWARD, DAVID
To: NEWPORT FAB, LLC DBA JAZZ SEMICONDUCTOR
Reel/Frame 016534/0860 →