IP Library Granted Patent US 7,629,272
Granted Patent B2
US 7,629,272 · App. 11/146,742 · Granted Dec 8, 2009

Ultraviolet assisted porogen removal and/or curing processes for forming porous low k dielectrics

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Quick Facts
Patent No.
US 7,629,272
App. No.
11/146,742
Granted
Dec 8, 2009
Kind
B2
Abstract

Processes for forming porous low k dielectric materials from low k dielectric films containing a porogen material include exposing the low k dielectric film to ultraviolet radiation. In one embodiment, the film is exposed to broadband ultraviolet radiation of less than 240 nm for a period of time and intensity effective to remove the porogen material. In other embodiments, the low k dielectric film is exposed to a first ultraviolet radiation pattern effective to increase a crosslinking density of the film matrix while maintaining a concentration of the porogen material substantially the same before and after exposure to the first ultraviolet radiation pattern. The low k dielectric film can be then be processed to form a metal interconnect structure therein and subsequently exposed to a second ultraviolet radiation pattern effective to remove the porogen material from the low k dielectrics film and form a porous low k dielectric film.

Claims (26)

1. A process for forming an electrical interconnect structure, the process comprising, in sequence:

depositing a non-porous dielectric material onto a substrate, wherein the non-porous dielectric material consists essentially of a matrix and a porogen material;

patterning the non-porous dielectric material and forming a metal interconnect structure; and

exposing the non-porous low k dielectric material to an ultraviolet radiation pattern for a period of time effective to remove a portion of the porogen material, wherein the removed portion forms pores within the matrix and forms a porous dielectric material, wherein the ultraviolet radiation pattern comprises broadband wavelengths less than 240 nanometers.

2. The process of claim 1 , wherein the porous dielectric material has an elastic modulus greater than or equal to about 2.5 GPa.

3. The process of claim 1 , wherein the porous dielectric material has material hardness greater than or equal to about 0.25 GPa.

4. The process of claim 1 , wherein the porous dielectric material has material hardness between about 0.25 GPa and about 1.2 GPa.

5. The process of claim 1 , wherein the porous dielectric material has an elastic modulus is between about 4 GPa and about 12 GPa.

6. The process of claim 1 , wherein forming the metal interconnect structure comprises depositing a copper metal.

7. The process of claim 1 , wherein the porogen material degrades upon exposure to the ultraviolet radiation to form volatile fragments or radicals.

8. The process of claim 1 , wherein exposing the non-porous dielectric material prior to the ultraviolet radiation pattern comprises purging an atmosphere about the non-porous dielectric material with an inert gas.

9. The process of claim 1 , further comprising exposing the non-porous dielectric material to a different ultraviolet radiation pattern for a period of time and intensity effective to crosslink the matrix.

10. A process for forming an electrical interconnect structure, the process comprising:

depositing a non-porous dielectric material comprising a matrix and a porogen material onto a substrate;

exposing the non-porous dielectric film to a first ultraviolet radiation pattern, wherein the first ultraviolet radiation pattern is effective to increase the crosslinking density of the non-porous dielectric film, and wherein a concentration of the porogen material remains substantially the same before and after exposure to the first ultraviolet radiation pattern;

patterning the non-porous dielectric material and forming a metal interconnect structure in the patterned non-porous dielectric material; and

exposing the non-porous dielectric material to a second ultraviolet radiation pattern in an amount to effectively remove porogen material from the matrix and form a porous low k dielectric material.

11. The process of claim 10 , wherein the first ultraviolet radiation pattern comprises wavelengths greater than about 240 nanometers; and the second ultraviolet radiation pattern comprises wavelengths that extend below 240 nanometers.

12. The process of claim 10 , wherein exposing the low k dielectric material to the second ultraviolet radiation pattern is in an atmosphere of N 2 , H 2 , Ar, He, Ne, H 2 O vapor, CO z , O z , C x H y , C x F y , C x H z F y , and mixtures thereof wherein x is an integer between 1 and 6, y is an integer between 4 and 14, and z is an integer between 1 and 3.

13. A process for forming an electrical interconnect structure, the process comprising:

depositing a non-porous dielectric material onto a substrate, wherein the non-porous dielectric material comprises a porogen material;

patterning the non-porous dielectric material and forming a metal interconnect structure; and

exposing the metal interconnect structure to an ultraviolet radiation pattern for a period of time effective to remove the porogen material from the non-porous dielectric material, wherein the removed portion forms air gaps between the metal interconnect structures, wherein the ultraviolet radiation pattern comprises broadband wavelengths less than 240 nanometers.

14. The process of claim 13 , wherein exposing the metal interconnect structure to the ultraviolet radiation pattern comprises creating an atmosphere of N 2 , H 2 , Ar, He, Ne, H 2 O vapor, CO z , O z , C x H y , C x F y , C x H z F y , and mixtures thereof wherein x is an integer between 1 and 6, y is an integer between 4 and 14, and z is an integer between 1 and 3 about the metal interconnect structure.

15. The process of claim 13 , wherein exposing the metal interconnect structure to the ultraviolet radiation pattern is for a time less than 600 seconds.

16. The process of claim 13 , further comprising heating the substrate prior to, simultaneously with, or after exposing the metal interconnect structure to the ultraviolet irradiation.

Assignments (4)
RELEASE OF SECURITY INTEREST Recorded Apr 7, 2023
From: SILICON VALLEY BANK A DIVISION OF FIRST-CITIZENS BANK & TRUST COMPANY
To: AXCELIS TECHNOLOGIES, INC.
Reel/Frame 063270/0277 →
SECURITY INTEREST Recorded Jul 31, 2020
From: AXCELIS TECHNOLOGIES, INC.
To: SILICON VALLEY BANK, AS ADMINISTRATIVE AGENT
Reel/Frame 053375/0055 →
SECURITY AGREEMENT Recorded May 9, 2008
From: AXCELIS TECHNOLOGIES, INC.
To: SILICON VALLEY BANK
Reel/Frame 020986/0143 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 11, 2005
From: WALDFRIED, CARLO; HAN, QINGYUAN; ESCORCIA, ORLANDO; BERRY, IVAN, III
To: AXCELIS TECHNOLOGIES, INC.
Reel/Frame 016873/0496 →