Method for forming trench gate dielectric layer
View Patent ↗A method for forming a trench gate dielectric layer is described. First, a substrate having a trench therein is provided. An in-situ steam generated oxidation process is performed to form a sacrificial layer on the surface of the trench. Then, the sacrificial layer is removed. Next, a low-pressure chemical vapor deposition is performed to form a gate dielectric layer on the surface of the trench.
1. A method for forming a trench gate dielectric layer, comprising:
providing a substrate having a trench therein;
performing an in-situ steam generated (ISSG) oxidation process to form a sacrificial oxide layer on the surface of the trench;
removing the sacrificial oxide layer; and
performing a low-pressure chemical vapor deposition process to form a gate dielectric layer on the surface of the trench.
2. The method of claim 1 , wherein the in-situ steam generated oxidation process is carried out at a temperature between 1000˜1050° C.
3. The method of claim 1 , wherein the reactive gases used in the in-situ steam generated oxidation process include hydrogen (H2) and oxygen (O2).
4. The method of claim 3 , wherein the gas flow rate of H2/O2 in the in-situ steam generated oxidation process is between (0.3˜0.7)/(9˜10) slm.
5. The method of claim 1 , wherein the sacrificial oxide layer has a thickness between 80˜150 Å.
6. The method of claim 1 , wherein the step of removing the sacrificial oxide layer comprises performing a hydrofluoric acid (HF) dip process.
7. The method of claim 1 , wherein the gate dielectric layer comprises a gate oxide layer.
8. The method of claim 7 , wherein the material of the gate oxide layer comprises silicon oxide.
9. The method of claim 8 , wherein the reactive gases used in the low-pressure chemical vapor deposition process include dichlorosilane (SiH2Cl2) and nitrous oxide (N2O).
10. The method of claim 9 , wherein the gas flow rate of the reactive gases SiH2Cl2/N2O in the low-pressure chemical vapor deposition process is between (150˜200)/(250˜350) sccm.
11. The method of claim 8 , wherein the low-pressure chemical vapor deposition process is carried out at a temperature between 700˜850° C.
12. The method of claim 8 , wherein the low-pressure chemical vapor deposition process is carried out at a pressure between 0.2˜0.35 torr.
13. The method of claim 8 , wherein the gate dielectric layer has a thickness between 70˜135 Å.
14. The method of claim 1 , wherein after forming the gate dielectric layer, further comprises performing a thermal treatment.
15. The method of claim 14 , wherein the thermal treatment includes performing a rapid thermal oxidation annealing process.
16. The method of claim 15 , wherein the rapid thermal oxidation annealing process is carried out at a reacting temperature between 950˜1100° C.
17. The method of claim 15 , wherein the reactive gases used in the rapid thermal oxidation annealing process includes nitric oxide (NO) and oxygen (O2).
18. The method of claim 17 , wherein the gas flow rate of the reactive gases NO/O2 used in the rapid thermal oxidation process is between (0.4˜0.6)/(1˜3) slm.
19. The method of claim 15 , wherein the rapid thermal oxidation annealing process is carried out for a duration of between 10˜60 seconds.