IP Library Granted Patent US 7,202,128
Granted Patent B1
US 7,202,128 · App. 11/165,330 · Granted Apr 10, 2007

Method of forming a memory device having improved erase speed

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Quick Facts
Patent No.
US 7,202,128
App. No.
11/165,330
Granted
Apr 10, 2007
Kind
B1
Abstract

A method of forming a memory device includes forming a memory stack on a substrate. The memory stack includes an alumina layer acting as an intergate dielectric layer. A transistor is formed on the substrate in an area separate from the memory stack. The transistor is formed to include thin gate oxide via a dry oxidation technique and a gate layer on the thin gate oxide. The thin gate oxide is formed without subjecting the thin gate oxide to thermal annealing with N 2 O.

Claims (43)

1. A method of forming a memory device on a substrate comprising:

forming a memory stack on the substrate, the memory stack including an alumina layer as an intergate dielectric;

forming a thin gate oxide on the substrate in an area separate from the memory stack using a dry oxidation technique; and

forming a gate layer on the thin gate oxide,

wherein the thin gate oxide is formed without subjecting the thin gate oxide to thermal annealing with N 2 0.

2. The method of forming the memory device recited in claim 1 , wherein the thin gate oxide is formed to a thickness of approximately 30 Å.

3. The method of forming the memory device recited in claim 1 , wherein the thin gate oxide is formed to a thickness of between approximately 25 Å and 70 Å.

4. The method of forming the memory device recited in claim 3 , wherein the dry oxidation of the thin gate oxide is performed at a temperature between about 725° C. and 900° C.

5. The method of claim 1 , wherein the dry oxidation is performed without the presence of hydrogen chloride in ambient atmosphere to prevent outgassing of aluminum from the alumina layer.

6. The method of claim 1 , wherein forming a memory stack on the substrate includes:

forming a first dielectric layer for the memory stack;

forming a charge storing layer on the first dielectric layer;

forming a second dielectric layer on the charge storing layer; and

forming the alumina layer on the second dielectric.

7. The method of claim 6 , wherein the first and second dielectric layers include silicon oxide.

8. The method of claim 6 , wherein the alumina layer includes Al 2 O 3 .

9. The method of claim 1 , further comprising:

forming a thick gate oxide on the substrate in an area separate from the memory stack and separate from the thin gate oxide using a wet oxidation technique; and

forming a second gate layer on the thick gate oxide.

10. A method of forming a memory device comprising:

forming an AONO (alumina-oxide-nitride-oxide) memory stack; and

forming a gate oxide, after formation of the AONO memory stack, using a dry oxidation technique,

wherein the gate oxide is formed without subjecting the gate oxide to thermal annealing to strengthen the gate oxide against breakdown.

11. The method of claim 10 , whereby the alumina of the AONO memory stack does not include defects that otherwise would occur if the gate oxide was subjected to thermal annealing to strengthen the gate oxide against breakdown.

12. The method of claim 10 , whereby the memory stack exhibits improved erase speed when using Fowler-Nordheim (FN) erase mechanisms.

13. The method of claim 10 , further comprising:

forming a gate layer over the gate oxide.

14. The method of claim 10 , wherein the gate oxide is formed to a thickness of approximately 30 Å.

15. The method of claim 10 , wherein the thin gate oxide is formed to a thickness of between approximately 25 Å and 70 Å.

16. The method of claim 15 , wherein the dry oxidation of the thin gate oxide is performed at a temperature between about 725° C. and 900° C.

17. The method of claim 10 , wherein the dry oxidation is performed without the presence of hydrogen chloride in ambient atmosphere to thereby prevent outgassing of aluminum.

18. A method for forming a solid-state memory device comprising:

forming a memory cell by:

forming a first oxide layer of a memory cell,

forming a charge storing layer on the oxide layer,

forming a second oxide layer on the charge storing layer, and

forming an aluminum oxide layer on the second oxide layer; and

forming a thin film transistor by:

forming a thin gate oxide using a dry oxidation technique without the presence of hydrogen chloride in ambient atmosphere to prevent outgassing of aluminum from the aluminum oxide layer, and

forming a gate layer on the thin gate oxide,

wherein the thin gate oxide is formed without subjecting the thin gate oxide to thermal annealing with N 2 O.

19. The method of claim 18 , wherein the thin gate oxide is formed to a thickness of between approximately 25 Å and 70 Å.

20. The method of claim 19 , wherein the dry oxidation of the thin gate oxide is performed at a temperature between about 725° C. and 900° C.

Assignments (10)
RELEASE OF SECURITY INTEREST Recorded Nov 20, 2020
From: WILMINGTON TRUST, NATIONAL ASSOCIATION
To: GLOBALFOUNDRIES INC.
Reel/Frame 054636/0001 →
SECURITY AGREEMENT Recorded Nov 29, 2018
From: GLOBALFOUNDRIES INC.
To: WILMINGTON TRUST, NATIONAL ASSOCIATION
Reel/Frame 049490/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE FOLLOWING NUMBERS 6272046,7277824,7282374,7286384,7299106,7337032,7460920,7519447 PREVIOUSLY RECORDED ON REEL 039676 FRAME 0237. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Oct 16, 2018
From: CYPRESS SEMICONDUCTOR CORPORATION
To: MORGAN STANLEY SENIOR FUNDING
Reel/Frame 047797/0854 →
RELEASE OF SECURITY INTEREST Recorded Jun 22, 2018
From: MORGAN STANLEY SENIOR FUNDING INC.,
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 046180/0604 →
SECURITY INTEREST Recorded Aug 15, 2016
From: CYPRESS SEMICONDUCTOR CORPORATION
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039676/0237 →
RELEASE OF SECURITY INTEREST Recorded Mar 13, 2015
From: BARCLAYS BANK PLC
To: SPANSION LLC; SPANSION INC.; SPANSION TECHNOLOGY LLC
Reel/Frame 035201/0159 →
SECURITY AGREEMENT Recorded Jun 4, 2010
From: SPANSION LLC; SPANSION INC.; SPANSION TECHNOLOGY INC.; SPANSION TECHNOLOGY LLC
To: BARCLAYS BANK PLC
Reel/Frame 024522/0338 →
AFFIRMATION OF PATENT ASSIGNMENT Recorded Aug 18, 2009
From: ADVANCED MICRO DEVICES, INC.
To: GLOBALFOUNDRIES INC.
Reel/Frame 023119/0083 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 24, 2005
From: ORIMOTO, TAKASHI WHITNEY
To: ADVANCED MICRO DEVICES, INC.
Reel/Frame 016720/0787 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 24, 2005
From: SACHAR, HARPREET K.
To: SPANSION LLC
Reel/Frame 016720/0782 →