Method and apparatus for controlling output current of a cascaded DC/DC converter
View Patent ↗A circuit and a method for controlling output current of cascaded switching power converters having a buck type output stage are disclosed. The circuit comprises two comparators for sensing input and output current, a logic gate for processing the output states of the comparators, and a pulse width modulator circuit for receiving the output of the logic gate and for controlling a switching power converter in accordance with this output. The method comprises simultaneous monitoring current in the stages of the converter, comparing the currents to the corresponding reference levels, generating the corresponding error signals, and controlling a pulse-width modulator circuit of a switching converter in accordance with these error signals.
1. A power converter circuit comprising:
input terminals for receiving input power;
output terminals for delivering constant current to a load;
a cascaded power converter coupled to the input and output terminals comprising:
an input stage, the input stage having an input boost inductor;
an output stage, the output stage being of a buck type comprising an output filter inductor for smoothing current in the load;
at least one coupling capacitor coupled to coupled to the input boost inductor and to the output filter inductor;
a first current sensor coupled to the input stage for monitoring current in the input stage;
a second current sensor coupled to the output stage for monitoring current in the output filter inductor;
a first reference current;
a second reference current;
a first comparator circuit coupled to the first current sensor and the first reference current;
a second comparator circuit coupled to the second current sensor and the second reference current; and
a pulse width modulator circuit;
a controlled switching circuit for coupling an input of the input stage to the input terminals and for coupling an output of the input stage to an input of said output stage;
wherein the first comparator changing an output state when output of the first current sensor exceeds the first reference;
wherein the second comparator changing an output state when output of the second current sensor exceeds the second reference;
wherein the pulse width modulator circuit controls the controlled switching circuit based on output states of the first and second comparators.
2. A power converter in accordance with claim 1 further comprising a damping circuit coupled to the input boost inductor and to the output filter inductor.
3. A power converter in accordance with claim 2 wherein the damping circuit comprises:
a resistor attached to the input boost inductor; and
a damping circuit capacitor attached to the output filter inductor.
4. A power converter in accordance with claim 1 further comprising a power transformer, wherein the at least one coupling capacitor comprises:
a first coupling capacitor attached to the input boost inductor and to a first winding of the power transformer; and
a second coupling capacitor attached to the output filter inductor and to a second winding of the power transformer.
5. A power converter in accordance with claim 1 wherein the controlled switching circuit comprises a single switching transistor for both coupling the input of the input stage to the input terminals and for coupling the output of the input stage to the input of the output stage.
6. A power converter in accordance with claim 1 wherein said pulse width modulator circuit further includes a logic gate for generating a logic output in accordance with the states of said first comparator and said second comparator.
7. A power converter in accordance with claim 6 wherein the logic gate performs Boolean multiplication of output states of the first comparator and the second comparator.
8. A power converter in accordance with claim 6 wherein the logic gate performs Boolean summation of output states of the first comparator and the second comparator.
9. A power converter in accordance with claim 6 wherein the first reference and the second reference vary levels depending on the output of the logic gate, and wherein the controlled switching circuit is switched off when the output of the logic gate is low, and wherein the controlled switching circuit is switched on when the output of the logic gate is low.
10. A power converter in accordance with claim 9 wherein the first reference is equal to one of a first level or a second level based on the output of the logic gate, and wherein the second reference is equal to one of a third level or a fourth level based on the output of the logic gate.
11. A power converter in accordance with claim 6 wherein levels of the first reference and the second reference are invariant of the output of the logic gate.
12. A power converter in accordance with claim 11 , wherein the pulse width modulator further comprises a flip-flop circuit, wherein the switching state of the controlled switching circuit depends on an output state of said flip-flop circuit.
13. A power converter in accordance with claim 12 , wherein the flip-flop circuit switching to a low output state upon one of the output of the first current sensor exceeding the first reference or said second current sensor output exceeding said second reference.
14. A power converter in accordance with claim 13 wherein the pulse width modulator further comprises a clock input, the flip-flop circuit switched to a high output state upon receiving a clock signal at the clock input.
15. A power converter in accordance with claim 14 wherein the pulse width modulator further comprises an oscillator circuit for generating the clock signal.
16. A power converter in accordance with claim 14 wherein the clock signal is constant-frequency.
17. A power converter in accordance with claim 14 wherein said clock signal is variable-frequency.
18. A power converter in accordance with claim 17 wherein the clock signal is generated after a constant delay following a turn-off transition of the controlled switching circuit.
19. A power converter in accordance with claim 1 wherein the cascaded power converter is a boost-buck (Cuk) converter.
20. A power converter in accordance with claim 1 wherein the cascaded power converter is a Zeta converter.
21. A power converter in accordance with claim 1 wherein the cascaded power converter is a “quadratic” converter comprising the input stage of a buck type.
22. A power converter in accordance with claim 1 wherein the cascaded power converter is a “quadratic” converter comprising the input stage of a buck-boost type.
23. A power converter in accordance with claim 1 wherein the cascaded power converter is an AC-to-DC converter, and wherein the input stage is operated in discontinuous conduction mode to achieve low harmonic distortion of input AC current of the AC-to-DC converter.
24. A power converter in accordance with claim 1 wherein the cascaded power converter further comprises a power transformer for achieving galvanic isolation between the input terminals and the output terminals.
25. A power converter in accordance with claim 1 wherein the first reference and the second reference are controlled externally to program the output current of the power converter.