Method and structure for forming slot via bitline for MRAM devices
View Patent ↗A magnetic random access memory (MRAM) device includes a magnetic tunnel junction (MTJ) stack formed over a lower wiring level, a hardmask formed on the MTJ stack, and an upper wiring level formed over the hardmask. The upper wiring level includes a slot via bitline formed therein, the slot via bitline in contact with the hardmask and in contact with an etch stop layer partially surrounding sidewalls of the hardmask.
1. A magnetic random access memory (MRAM) device, comprising:
a magnetic tunnel junction (MTJ) stack formed over a lower wiring level;
a conductive hardmask formed directly upon said MTJ stack; and
an upper wiring level formed over said hardmask, said upper wiring level comprising a slot via bitline formed therein, said slot via bitline in contact with said hardmask and in contact with an etch stop layer at least partially surrounding sidewalls of said hardmask;
wherein said slot via bitline has a bottom surface topography associated therewith such that the bottom surface of said slot via bitline is in contact with said hardmask and said etch stop layer in accordance with topographical height changes of the etch stop layer and with topographical height changes between the etch stop layer and the hardmask.
2. The MRAM device of claim 1 , further comprising:
a conductive lateral strap upon which said MTJ stack is formed; and
a strap via connecting said strap to a first conductor within said lower wiring level.
3. The MRAM device of claim 2 , wherein said etch stop layer comprises a material that is selectively etched with respect to said hardmask layer.
4. The MRAM device of claim 3 , further comprising a conductive landing pad formed at the same level as said strap via, said conductive landing pad in contact with a second conductor within said lower level in a peripheral portion of the device.
5. The MRAM device of claim 4 , further comprising a logic via formed on said conductive landing pad, said logic via extending through said etch stop layer.
6. The MRAM device of claim 5 , further comprising an upper level logic wiring conductor in contact with said logic via.
7. The MRAM device of claim 1 , wherein the slot via bitline is formed in a manner so as to land on a top surface of the etch stop layer without also penetrating through the etch stop layer.
8. The MRAM device of claim 1 , wherein the slot via bitline comprises a single fill material.