High speed interface design
View Patent ↗The embodiments of the present invention are directed toward the design of routing patterns, including elements such as contacts, traces, and vias, for high speed differential signal pairs in integrated circuit package substrates.
1. A routing pattern for high speed signals for a package substrate, the routing pattern comprising:
traces for the high speed signals, where trace pairs for differential pairs of high speed signals,
have substantially similar lengths,
are bounded along substantially their entire lengths by grounded guard traces,
have arcing corners, and
straight portions of the traces having a length between the arcing corners and other reflecting portions of the traces that is not an integer multiple of a minimum time between transitions of the high speed signals,
contacts for the high speed signals, the contacts connected to the high speed signal traces, where differential pairs of contacts associated with the differential pairs of high speed signals,
are exclusively disposed adjacent an edge of the package substrate, with a first of the contacts in the differential pair of contacts disposed closer to the edge of the package substrate than a second of the contacts in the differential pair,
are disposed such that a line through the differential pair of contacts is substantially perpendicular to the edge of the package substrate,
the first contact in the differential pair of contacts is designated a positive contact and the second contact in the differential pair of contacts is designated a negative contact, and all of the differential pairs of contacts are consistently disposed with the positive contact and the negative contact in a consistent position in each differential pair of contacts relative to the edge of the package substrate, and
are disposed at a set first distance one from another, and all contacts for the high speed signals are disposed from contacts for lower speed signals by a distance of more than (2) 1/2 times the set first distance,
vias for the high speed signals, the vias connected to the high speed signal traces, where differential pairs of vias associated with the differential pairs of high speed signals,
are disposed at a set second distance one from another, and all vias for the high speed signals are disposed from vias for lower speed signals by a distance of more than (2) 1/2 times the set second distance,
plane metal disposed symmetrically around the high speed vias and the high speed contacts,
redundant power vias disposed adjacent a border of the package substrate where an integrated circuit edge is designed to reside, where the redundant power vias connect in a straighter line between contacts on a first side of the package substrate, power planes, and contacts on an opposing second side of the package substrate than do other power vias, and
power traces having a width that is greater than a width of the high speed signal traces.
2. A routing pattern for high speed signals for a package substrate, the routing pattern comprising traces for the high speed signals, where trace pairs for differential pairs of high speed signals have arcing corners.
3. The routing pattern of claim 2 , where the traces for the high speed signal,
have substantially similar lengths,
are bounded along substantially their entire lengths by grounded guard traces, and
straight portions of the traces having a length between the arcing corners and other reflecting portions of the traces that is not an integer multiple of a minimum time between transitions of the high speed signals.
4. The routing pattern of claim 2 , further comprising contacts for the high speed signals, the contacts connected to the high speed signal traces, where differential pairs of contacts associated with the differential pairs of high speed signals,
are exclusively disposed adjacent an edge of the package substrate, with a first of the contacts in the differential pair of contacts disposed closer to the edge of the package substrate than a second of the contacts in the differential pair,
are disposed such that a line through the differential pair of contacts is substantially perpendicular to the edge of the package substrate,
the first contact in the differential pair of contacts is designated a positive contact and the second contact in the differential pair of contacts is designated a negative contact, and all of the differential pairs of contacts are consistently disposed with the positive contact and the negative contact in a consistent position in each differential pair of contacts relative to the edge of the package substrate, and
are disposed at a set first distance one from another, and all contacts for the high speed signals are disposed from contacts for lower speed signals by a distance of more than (2) 1/2 times the set first distance.
5. The routing pattern of claim 2 , further comprising vias for the high speed signals, the vias connected to the high speed signal traces, where differential pairs of vias associated with the differential pairs of high speed signals are disposed at a set second distance one from another, and all vias for the high speed signals are disposed from vias for lower speed signals by a distance of more than (2) 1/2 times the set second distance.
6. The routing pattern of claim 2 , further comprising redundant power vias disposed adjacent a border of the package substrate where an integrated circuit edge is designed to reside, where the redundant power vias connect in a straighter line between contacts on a first side of the package substrate, power planes, and contacts on an opposing second side of the package substrate than do other power vias.
7. The routing pattern of claim 2 , further comprising power traces having a width that is greater than a width of the high speed signal traces.
8. A routing pattern for high speed signals for a package substrate, the routing pattern comprising traces for the high speed signals, where trace pairs for differential pairs of high speed signals have straight portions having a length between corners and other reflecting portions of the traces that is not an integer multiple of a minimum time between transitions of the high speed signal.
9. The routing pattern of claim 8 , wherein the trace pairs for differential pairs of high speed signals,
have substantially similar lengths,
are bounded along substantially their entire lengths by grounded guard traces, and
have arcing corners.
10. The routing paftern of claim 8 , further comprising contacts for the high speed signals, the contacts connected to the high speed signal traces, where differential pairs of contacts associated with the differential pairs of high speed signals,
are exclusively disposed adjacent an edge of the package substrate, with a first of the contacts in the differential pair of contacts disposed closer to the edge of the package substrate than a second of the contacts in the differential pair,
are disposed such that a line through the differential pair of contacts is substantially perpendicular to the edge of the package substrate,
the first contact in the differential pair of contacts is designated a positive contact and the second contact in the differential pair of contacts is designated a negative contact, and all of the differential pairs of contacts are consistently disposed with the positive contact and the negative contact in a consistent position in each differential pair of contacts relative to the edge of the package substrate, and
are disposed at a set first distance one from another, and all contacts for the high speed signals are disposed from contacts for lower speed signals by a distance of more than (2) 1/2 times the set first distance.
11. The routing pattern of claim 8 , further comprising vias for the high speed signals, the vias connected to the high speed signal traces, where differential pairs of vias associated with the differential pairs of high speed signals are disposed at a set second distance one from another, and all vias for the high speed signals are disposed from vias for lower speed signals by a distance of more than (2) 1/2 times the set second distance.
12. The routing pattern of claim 8 , further comprising redundant power vias disposed adjacent a border of the package substrate where an integrated circuit edge is designed to reside, where the redundant power vias connect in a straighter line between contacts on a first side of the package substrate, power planes, and contacts on an opposing second side of the package substrate than do other power vias.
13. The routing pattern of claim 8 , further comprising power traces having a width that is greater than a width of the high speed signal traces.
14. A routing pattern for high speed signals for a package substrate, the routing pattern comprising contacts for the high speed signals, where differential pairs of contacts associated with differential pairs of high speed signals,
are exclusively disposed adjacent an edge of the package substrate, with a first of the contacts in the differential pair of contacts disposed closer to the edge of the package substrate than a second of the contacts in the differential pair,
are disposed such that a line through the differential pair of contacts is substantially perpendicular to the edge of the package substrate,
the first contact in the differential pair of contacts is designated a positive contact and the second contact in the differential pair of contacts is designated a negative contact, and all of the differential pairs of contacts are consistently disposed with the positive contact and the negative contact in a consistent position in each differential pair of contacts relative to the edge of the package substrate, and
are disposed at a set first distance one from another, and all contacts for the high speed signals are disposed from contacts for lower speed signals by a distance of more than (2) 1/2 times the set first distance.
15. The routing pattern of claim 14 , further comprising traces for the high speed signals, where trace pairs for differential pairs of high speed signals,
have substantially similar lengths,
are bounded along substantially their entire lengths by grounded guard traces,
have arcing corners, and
straight portions of the traces having a length between the arcing corners and other reflecting portions of the traces that is not an integer multiple of a minimum time between transitions of the high speed signals.
16. The routing pattern of claim 14 , further comprising vias for the high speed signals, the vias connected to high speed signal traces, where differential pairs of vias associated with the differential pairs of high speed signals are disposed at a set second distance one from another, and all vias for the high speed signals are disposed from vias for lower speed signals by a distance of more than (2) 1/2 times the set second distance.
17. The routing pattern of claim 14 , further comprising plane metal disposed symmetrically around the high speed contacts.
18. The routing pattern of claim 14 , further comprising redundant power vias disposed adjacent a border of the package substrate where an integrated circuit edge is designed to reside, where the redundant power vias connect in a straighter line between contacts on a first side of the package substrate, power planes, and contacts on an opposing second side of the package substrate than do other power vias.