Granted Patent B2

US 7,700,398 · App. 11/197,746 · Granted Apr 20, 2010

Abstract

Claims (81)

1. Method for fabricating an integrated device, comprising:

providing a substrate, including an electrode element;

providing a solid electrolyte element coupled to the electrode element, thereby forming a programmable resistance element, and wherein the solid electrolyte element is rendered in a crystalline state by an interstitial process; and

applying a heating process, after providing the solid electrolyte element.

2. Method as claimed in claim 1 , wherein the crystalline state of the solid electrolyte element is provided to maintain a programmable resistance property of the programmable resistance element during and after the heating process.

3. Method as claimed in claim 1 , wherein the crystallinity of the solid electrolyte element is such that the programmable resistance element after the heating process possesses a programmable resistance property.

4. Method as claimed in claim 1 , wherein the heating process is performed at least for one of the purposes:

to anneal a doped region of the integrated device; and

to form a passivating seal.

5. Method as claimed in claim 1 , wherein the solid electrolyte element is in a mono-crystalline state.

6. Method as claimed in claim 1 , wherein the solid electrolyte element is in a poly-crystalline state.

7. Method as claimed in claim 1 , wherein the solid electrolyte element is in a nano-crystalline state.

8. Method as claimed in claim 1 , wherein the method for fabricating the integrated device is embedded into a CMOS fabricating process.

9. Method as claimed in claim 1 , wherein the solid electrolyte element includes at least one of:

Germanium-Selenide (GeSe, GeSe 2 );

Germanium-Sulfide (GeS, GeS 2 );

Germanium-Telluride (GeTe);

Silicon-Selenide (SiSe);

Silicon-Sulfide (SiS);

Lead-Sulfide (PbS);

Lead-Selenide (PbSe);

Lead-Telluride (PbTe);

Tin-Sulfide (SnS);

Tin-Selenide (SnSe);

Tin-Telluride (SnTe);

Zinc-Sulfide (ZnS);

Zinc-Selenide (ZnSe);

Cadmium-Sulfide (CdS);

Cadmium-Selenide (CdSe);

Copper (Cu);

Silver (Ag);

Zinc (Zn);

Lithium (Li); and

Sodium (Na).

10. Method as claimed in claim 1 , wherein the electrode element includes at least one of:

Copper (Cu);

Silver (Ag);

Zinc (Zn);

Lithium (Li); and

Sodium (Na).

11. Method for fabricating an integrated device, comprising:

providing a substrate, including an electrode element;

providing a solid electrolyte element coupled to the electrode element, thereby forming a programmable resistance element, wherein providing the solid electrolyte element comprises:

providing the solid electrolyte element in an amorphous state; and

rendering the solid electrolyte element crystalline; and

applying a heating process, after providing the solid electrolyte element, wherein the heating process comprises a temperature change ranging from 5 to 100 Kelvin per second.

12. Method as claimed in claim 11 , wherein providing the solid electrolyte element comprises implanting a metal into the solid electrolyte element.

13. Method as claimed in claim 12 , wherein implanting a metal into the solid electrolyte element comprises:

providing a metal adjacent to the solid electrolyte element;

driving the metal into the solid electrolyte element; and

removing the metal adjacent to the solid electrolyte element.

14. Method as claimed in claim 11 , wherein rendering the solid electrolyte crystalline comprises a rapid temperature process with a pre-determined temperature profile versus time.

15. Method as claimed in claim 14 , wherein the temperature profile comprises a heating stage with at least one heating rate ranging from 5 to 100 Kelvin per second.

16. Method as claimed in claim 14 , wherein the temperature profile comprises a temperature plateau stage and the duration of the plateau ranges from 5 to 400 seconds.

17. Method as claimed in claim 14 , wherein the temperature profile comprises a temperature plateau stage and the hold temperature ranges from 400° to 700°.

18. Method as claimed in claim 14 , wherein the temperature profile comprises a cooling stage with at least one cooling rate ranging from 5 to 100 Kelvin per second.

19. Method as claimed in claim 11 , wherein the solid electrolyte element is rendered mono-crystalline.

20. Method as claimed in claim 11 , wherein the solid electrolyte element is rendered poly-crystalline.

21. Method as claimed in claim 11 , wherein the solid electrolyte element is rendered nano-crystalline.

22. Method as claimed in claim 11 , wherein the method for fabricating the integrated device is embedded into a CMOS fabricating process.

23. Method for fabricating an integrated device, comprising:

providing a substrate, including an electrode element;

providing a solid electrolyte element coupled to the electrode element, thereby forming a programmable resistance element, wherein providing the solid electrolyte element comprises:

providing the solid electrolyte element in an amorphous state; and

rendering the solid electrolyte element crystalline; and

applying a heating process, after providing the solid electrolyte element;

wherein providing the solid electrolyte element comprises implanting a metal into the solid electrolyte element, wherein implanting a metal into the solid electrolyte element comprises:

providing a metal adjacent to the solid electrolyte element;

driving the metal into the solid electrolyte element; and

removing the metal adjacent to the solid electrolyte element.

24. Method for fabricating an integrated device, comprising:

providing a substrate, including an electrode element;

providing a solid electrolyte element coupled to the electrode element, thereby forming a programmable resistance element, wherein providing the solid electrolyte element comprises:

providing the solid electrolyte element in an amorphous state; and

rendering the solid electrolyte element crystalline; and

applying a heating process, after providing the solid electrolyte element;

wherein rendering the solid electrolyte crystalline comprises a rapid temperature process with a pre-determined temperature profile versus time, the temperature profile comprising a heating stage, a temperature plateau stage and a cooling stage.

25. Method as claimed in claim 24 , wherein the heating stage comprises at least one heating rate ranging from 5 to 100 Kelvin per second.

26. Method as claimed in claim 24 , wherein the temperature plateau stage comprises a duration of the plateau ranging from 5 to 400 seconds.

27. Method as claimed in claim 24 , wherein the temperature plateau stage comprises a hold temperature ranging from 400° to 700°.

28. Method as claimed in claim 24 , wherein the cooling stage comprises at least one cooling rate ranging from 5 to 100 Kelvin per second.

Assignments (11)