IP Library Granted Patent US 7,513,873
Granted Patent B2
US 7,513,873 · App. 11/243,775 · Granted Apr 7, 2009

Low-noise ultrasound method and beamformer system for doppler processing

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Quick Facts
Patent No.
US 7,513,873
App. No.
11/243,775
Granted
Apr 7, 2009
Kind
B2
Abstract

An ultrasonic low-noise analog beamformer for Doppler acquisition achieves high sensitivity by translating the frequency of the ultrasound echoes to an intermediate frequency, which is well above of the 1/f corner. This is accomplished by beamforming the downconverted RF signals instead of using their baseband representation. The baseband conversion, succeeding the beamformation, also incorporates the steps of clutter filtering and anti-aliasing. The invention is particularly suitable for low-voltage process technologies that support broadband applications.

Claims (52)

1. A method for receive beamforming in a CW Doppler ultrasound imaging system, comprising the steps of:

generating a plurality of RF ultrasound signals from a respective plurality of N transducer elements incorporated in an array;

receiving the plurality of RF ultrasound signals from the respective plurality of N transducer elements, said RF signals are characterized by a frequency, f RF ;

translating the frequency of said RF signals to an intermediate frequency, f IF , to produce a respective plurality of IF signals, said intermediate frequency is above the flicker noise corner frequency;

aligning the plurality of IF signals by a predetermined phasing;

summing said plurality of IF signals to produce a beamformed IF output; and

downconverting the beamformed IF output to a complex Doppler signal, wherein each of the above steps is performed by said CW Doppler ultrasound imaging system.

2. A method according to claim 1 , wherein said step of translating the frequency comprises the step of mixing the RF signals with a local oscillator (LO) clock signal (f LO ) and IF filtering.

3. A method according to claim 2 , wherein the step of IF filtering is performed after the step of mixing, and wherein the step of downconverting is performed after the step of summing.

4. A method according to claim 2 , wherein the step of IF filtering is performed after the step of summing, and wherein the step of downconverting is performed after the step of IF filtering.

5. A method according to claim 1 , wherein said step of aligning comprises the steps of:

calculating a desired delay profile across said plurality of transducer elements;

computing the per-element IF phase shift in conformity with said delay profile;

providing a predetermined set of LO clocks having their phases equally spaced in a range of 0° to 360°; and

selecting an adequate LO clock signal, f LO , for the IF phase shift using the best-fit criteria.

6. A method according to claim 5 , wherein all LO clocks are displaced up in frequency by f IF with respect to a nominal transmit/receive frequency f RF so that f LO =f IF +f RF .

7. A low-noise ultrasonic CW Doppler beamformer for processing a plurality of RF signals produced by a transducer array, comprising:

a plurality of Doppler channels, each Doppler channel configured to receive an RF signal from a respective transducer element and to produce a phase-rotated signal at an intermediate frequency IF responsive to said RF signal and to a local oscillator clock;

an N-input summer coupled to said plurality of Doppler channels for summing all of said phase-rotated signals and to produce a beamformed IF signal;

a downstream processor coupled to said N-input summer configured to downconvert said beamformed IF signal and to provide an approximately clutter-free complex signal, said processor having an input signal terminal;

a multi-phase clock oscillator coupled to said plurality of Doppler channels for providing a plurality of k phase-shifted LO clocks having their phases evenly spaced within a 360° range.

8. A low-noise ultrasonic CW Doppler beamformer according to claim 7 , wherein said multi-phase clock oscillator is a k-phase (k/2-stage) twisted ring counter supplied by an external clock at the rate of 2k·f LO .

9. A low-noise ultrasonic CW Doppler beamformer according to claim 7 , further comprising at least one low-pass filter (LPF) having an input port and an output port, said LPF is operative to filter the IF signals and to cancel the high-frequency products above a cut-off frequency.

10. A low-noise ultrasonic CW Doppler beamformer according to claim 7 , wherein each of said plurality of Doppler channels comprises:

a buffer amplifier;

a mixer coupled to said buffer amplifier configured to mix a buffered RF signal with a LO clock, said mixer having a signal port, a local oscillator (LO) port, and an output; and

a phase-selecting means operative to select a LO clock from said plurality of k phase-shifted clocks.

11. A low-noise ultrasonic CW Doppler beamformer according to claim 10 , wherein said phase-selecting means comprises:

a divide-by-2 counter connected to the LO port of the mixer; and

a multiplexer coupled to said divide-by-2 counter, said multiplexer comprising an output terminal providing a selected clock to said counter, a control port responsive for the clock selection, and k inputs.

12. A low-noise ultrasonic CW Doppler beamformer according to claim 10 , wherein each of said plurality of Doppler channels further comprises an LPF, and wherein:

the input port of said per-channel LPF connected to the mixer output;

the output port of said per-channel LPF connected to a respective input of the summer; and

the output IF node connected to the input terminal of said downstream processor.

13. A CW Doppler beamformer according to claim 9 , wherein each of the Doppler channels arranged to apply the mixer output to a respective input of the summer directly, and wherein:

the output IF node connected to the input port of a LPF; and

the output port of said LPF connected to the input terminal of said downstream processor.

14. A CW Doppler beamformer according to claim 7 , wherein said downstream processor further comprises:

a first and a second clock terminals operative to provide a first and a second reference clocks, a first and a second demodulators, each having a signal port, a reference port, and an output, and wherein:

the first and second demodulators operative to convert the beamformed IF signal to in-phase and quadrature-phase components, respectively;

the signal ports of the first and second demodulators are coupled to said input signal terminal; and

the reference ports of the first and second demodulators are coupled to the first and second clock terminals, respectively.

15. A CW Doppler beamformer according to claim 14 , wherein said downstream processor further comprises:

a first and a second filtering means connected to the outputs of the first and second demodulators, respectively, wherein each of said filtering means comprises a high-pass filter (HPF) and an anti-aliasing filter connected sequentially.

16. Downstream processor of claim 14 , wherein said first and second reference clocks are in quadrature and running at the f IF rate.

17. A method for receive beamforming in a CW Doppler ultrasound imaging system, comprising the steps of:

generating a plurality of RF ultrasound signals from a respective plurality of N transducer elements incorporated in an array;

receiving the plurality of RF ultrasound signals from the respective plurality of N transducer elements;

translating the plurality of RF ultrasound signals to a plurality of intermediate frequency (IF) signals, each of said plurality of IF signals being above the flicker noise corner frequency;

aligning the plurality of IF signals by a predetermined phasing;

summing said plurality of IF signals to produce a beamformed IF output; and

downconverting the beamformed IF output to a complex Doppler signal, wherein each of the above steps is performed by said CW Doppler ultrasound imaging system.

Assignments (16)
RELEASE OF SECURITY INTEREST Recorded Mar 14, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 060894/0437 →
RELEASE OF SECURITY INTEREST Recorded Mar 11, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059363/0001 →
RELEASE OF SECURITY INTEREST Recorded Mar 10, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059863/0400 →
RELEASE OF SECURITY INTEREST Recorded Mar 9, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059358/0001 →
RELEASE OF SECURITY INTEREST Recorded Feb 28, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED
Reel/Frame 059666/0545 →
RELEASE OF SECURITY INTEREST Recorded Feb 25, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059333/0222 →
SECURITY INTEREST Recorded Jun 4, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 057935/0474 →
SECURITY INTEREST Recorded Dec 24, 2020
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 055671/0612 →
SECURITY INTEREST Recorded Jun 5, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 053468/0705 →
RELEASE OF SECURITY INTEREST Recorded May 30, 2020
From: JPMORGAN CHASE BANK, N.A, AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 053466/0011 →
SECURITY INTEREST Recorded Apr 24, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 053311/0305 →
SECURITY INTEREST Recorded Sep 18, 2018
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 047103/0206 →
SECURITY INTEREST Recorded Jun 25, 2018
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 046426/0001 →
SECURITY INTEREST Recorded Feb 10, 2017
From: MICROCHIP TECHNOLOGY INCORPORATED
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 041675/0617 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 22, 2014
From: SUPERTEX LLC
To: MICROCHIP TECHNOLOGY INCORPORATED
Reel/Frame 034689/0257 →
CHANGE OF NAME Recorded Dec 19, 2014
From: SUPERTEX, INC.
To: SUPERTEX LLC
Reel/Frame 034682/0134 →