IP Library Granted Patent US 7,132,332
Granted Patent B2
US 7,132,332 · App. 11/247,328 · Granted Nov 7, 2006

Semiconductor memory device and manufacturing method thereof

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,132,332
App. No.
11/247,328
Granted
Nov 7, 2006
Kind
B2
Abstract

A polysilicon film and the like are patterned to form n − diffusion layers on a silicon substrate. Subsequently, an outer edge of an Al 2 O 3 film is made retreat to be smaller than that of a gate electrode by performing isotropic etching of the Al 2 O 3 film, using a solution of sulfuric acid with hydrogen peroxide. A silicon oxide film, a silicon nitride film, the polysilicon film and the like are hardly removed although the solution of sulfuric acid with hydrogen peroxide exhibits higher etching rate to the Al 2 O 3 film, enabling almost exclusive etching of the Al 2 O 3 film at a high selectivity ratio. Subsequently, another polysilicon film is formed so as to fill spaces formed after the retreat of the Al 2 O 3 film under the silicon oxide film. Subsequently, a sidewall insulating film is formed by remaining portions of the later polysilicon film in the spaces by performing RIE, oxidation, or the like of the later polysilicon film.

Claims (33)

1. A manufacturing method of a semiconductor memory device comprising the steps of:

forming a tunnel insulating film on a semiconductor substrate;

forming sequentially an Al 2 O 3 film, an insulating film, and a material film of a gate electrode on the tunnel insulating film;

forming a gate electrode by processing the material film of the gate electrode, the insulating film, and the Al 2 O 3 film into a planar shape of the gate electrode;

making a retreat of an outer edge of the Al 2 O 3 film to be smaller than an outer edge of the gate electrode by performing isotropic etching to the Al 2 O 3 film so as to form a pair of spaces under the insulating film;

forming charge storage layers respectively in the pair of spaces; and

forming a source region and a drain region sandwiching the gate electrode in plain view, as a pair, on a surface of the semiconductor substrate.

2. The manufacturing method of the semiconductor memory device according to claim 1 , wherein

isotropic etching of the Al 2 O 3 film is performed using a solution of sulfuric acid with hydrogen peroxide during the step of performing isotropic etching to the Al 2 O 3 film.

3. The manufacturing method of the semiconductor memory device according to claim 1 , wherein

a polycrystalline silicon film is formed as the charge storage layers.

4. The manufacturing method of the semiconductor memory device according to claim 1 , wherein

said step of forming the charge storage layers comprises the steps of:

forming a polycrystalline silicon film all over surface; and

making the polycrystalline silicon film remain in the spaces and forming a sidewall composed of the polycrystalline silicon film over side surfaces of the gate electrode and the insulating film by performing anisotropic etching to the polycrystalline silicon film.

5. The manufacturing method of the semiconductor memory device according to claim 4 , wherein

said step of forming the charge storage layers comprises a step of oxidizing the sidewall after the step of performing anisotropic etching to the polycrystalline silicon film.

6. The manufacturing method of the semiconductor memory device according to claim 1 , wherein

said step of forming the charge storage layers comprises the steps of:

forming a polycrystalline silicon film all over surface; and

making the polycrystalline silicon film remain only in the spaces by performing anisotropic etching to the polycrystalline silicon film.

7. The manufacturing method of the semiconductor memory device according to claim 6 , wherein

said step of forming the charge storage layers comprises the steps of:

forming an insulating film for a sidewall all over surface; and

forming a sidewall insulating film over side surfaces of the gate electrode and the insulating film by etching back the insulating film for the sidewall, after the step of performing anisotropic etching to the polycrystalline silicon film.

8. The manufacturing method of the semiconductor memory device according to claim 1 , wherein

the tunnel insulating film has a thickness of 3 nm to 9 nm.

9. The manufacturing method of the semiconductor memory device according to claim 1 , wherein

the Al 2 O 3 film and the pair of charge storage layers have a thickness of 5 nm to 15 nm.

10. The manufacturing method of the semiconductor memory device according to claim 2 , wherein

the tunnel insulating film has a thickness of 3 nm to 9 nm.

11. The manufacturing method of the semiconductor memory device according to claim 2 , wherein

the Al 2 O 3 film and a pair of charge storage layers have a thickness of 5 nm to 15 nm.

Assignments (11)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 15, 2022
From: CYPRESS SEMICONDUCTOR CORPORATION
To: INFINEON TECHNOLOGIES LLC
Reel/Frame 059721/0467 →
RELEASE OF SECURITY INTEREST Recorded Mar 16, 2022
From: MUFG UNION BANK, N.A.
To: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
Reel/Frame 059410/0438 →
CORRECTIVE ASSIGNMENT TO CORRECT THE 8647899 PREVIOUSLY RECORDED ON REEL 035240 FRAME 0429. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTERST. Recorded Nov 3, 2020
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 058002/0470 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN INTELLECTUAL PROPERTY Recorded Oct 28, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: MUFG UNION BANK, N.A.
Reel/Frame 050896/0366 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 30, 2015
From: SPANSION, LLC
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 036038/0467 →
SECURITY INTEREST Recorded Mar 21, 2015
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 035240/0429 →
RELEASE OF SECURITY INTEREST Recorded Mar 13, 2015
From: BARCLAYS BANK PLC
To: SPANSION LLC; SPANSION INC.; SPANSION TECHNOLOGY LLC
Reel/Frame 035201/0159 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 19, 2013
From: ISHIDAO, MASAKI; KOBAYASHI, MASAHIRO; FUKUDA, MASATOSHI
To: FUJITSU LIMITED
Reel/Frame 030250/0842 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 11, 2012
From: SPANSION INC.
To: SPANSION LLC
Reel/Frame 029112/0198 →
SECURITY AGREEMENT Recorded Jun 4, 2010
From: SPANSION LLC; SPANSION INC.; SPANSION TECHNOLOGY INC.; SPANSION TECHNOLOGY LLC
To: BARCLAYS BANK PLC
Reel/Frame 024522/0338 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 13, 2010
From: FUJITSU LIMITED
To: SPANSION INC.
Reel/Frame 024225/0119 →