IP Library Granted Patent US 7,477,084
Granted Patent B2
US 7,477,084 · App. 11/286,979 · Granted Jan 13, 2009

Multi-phase power supply controller and method therefor

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Quick Facts
Patent No.
US 7,477,084
App. No.
11/286,979
Granted
Jan 13, 2009
Kind
B2
Abstract

In one embodiment, a power supply controller is configured to use a plurality of ramp signals to generate a plurality of PWM control signals.

Claims (27)

1. A method of forming a power controller comprising:

configuring the power controller to form a plurality of PWM control signals to control an output voltage formed by the power controller;

configuring the power controller to receive a feedback signal that is representative of a value of the output voltage and responsively form a first error signal that is representative of a deviation of the output voltage from a desired value of the output voltage;

configuring a first PWM control block of the power controller to selectively use the first error signal to control a first PWM control signal of the plurality of PWM control signals for a first time period; and

configuring a second PWM control block of the power controller to selectively use the first error signal to control a second PWM control signal of the plurality of PWM control signals for a second time period.

2. The method of claim 1 wherein configuring the first PWM control block of the power controller to selectively use the first error signal to control the first PWM control signal includes configuring the first PWM control block to use the first error signal to set a first operating state wherein the first PWM control block asserts the first PWM control signal.

3. The method of claim 2 further including configuring the power controller to receive the feedback signal and responsively form a second error signal and configuring the first PWM control block to selectively use the second error signal to set a second operating state of the first PWM control block wherein the first PWM control block negates the first PWM control signal.

4. The method of claim 3 wherein configuring the first PWM control block to use the first error signal to set the first operating state wherein the first PWM control block asserts the first PWM control signal includes configuring the first PWM control block to selectively couple a first ramp signal to a first comparator for the first time period and use a signal from the first comparator to set the first operating state.

5. The method of claim 4 wherein configuring the first PWM control block to selectively use the second error signal to set the second operating state includes configuring the first PWM control block to selectively couple the first ramp signal to a second comparator and use a signal from the second comparator to control the second operating state.

6. The method of claim 5 wherein configuring the second PWM control block of the power controller to selectively use the first error signal to control the second PWM control signal includes configuring the second PWM control block to selectively couple a second ramp signal to the first comparator for the second time period and use the signal from the first comparator to control a first state of the second PWM control signal.

7. The method of claim 6 further including configuring the second PWM control block to selectively couple the second ramp signal to a second comparator and use the signal from the second comparator to control a second state of the second PWM control signal.

8. The method of claim 1 further including configuring the power controller to form the second time period with a portion of the first time period overlapping a portion of the second time period.

9. The method of claim 1 wherein configuring the first PWM control block of the power controller to selectively use the first error signal and configuring the second PWM control block of the power controller to selectively use the first error signal includes configuring the first PWM control block to use the first error signal to set a first state of the first PWM control signal and configuring the second PWM control block to use the first error signal to set a first state of the second PWM control signal and further including configuring the power controller to receive the feedback signal and responsively form a second error signal and configuring the first PWM control block and the second PWM control block to use the second error signal to set a second state of the respective first PWM control signal and second PWM control signal.

10. The method of claim 9 further including configuring a third PWM control block of the power controller to selectively use the first error signal to set a first state of a third PWM control signal of the plurality of PWM control signals and to use the second error signal to set a second state of the third PWM control signal.

11. A power supply controller comprising:

an error circuit coupled to receive a feedback signal and responsively form a first PWM modulator switching signal wherein the error circuit includes an error amplifier coupled to receive the feedback signal and form an error signal, and a first comparator coupled to receive the error signal and form the first PWM modulator switching signal, and wherein the error circuit is coupled to receive the feedback signal and form a second PWM modulator switching signal; and

a plurality of PWM control blocks with each PWM control block configured to use the first PWM modulator switching signal and the second PWM modulator switching signal to form a PWM control signal.

12. The power supply controller of claim 11 wherein the power supply controller includes a ramp generator configured to generate a plurality of ramp signals including a separate ramp signal for each PWM control block and wherein each PWM control block is configured to selectively couple the separate ramp signal for a respective PWM control block to the first comparator and selectively couple the separate ramp signal for the respective PWM control block to a second comparator.

13. The power supply controller of claim 12 wherein an output of the first comparator is used to set a first state of a PWM control block that is selectively coupling the separate ramp signal for that PWM control block to the first comparator and wherein an output of the second comparator is used to set a second state of the PWM control block that is selectively coupling the separate ramp signal for that PWM control block to the second comparator.

14. The power supply controller of claim 11 wherein the plurality of PWM control blocks includes at least three PWM control blocks.

15. A power supply controller comprising:

an error circuit coupled to receive a feedback signal and responsively form first and second PWM modulator signals;

a first PWM control block configured to use the first PWM modulator signal during a first time period to set a first operating state of the first PWM control block and to use the second PWM modulator signal to set a second operating state of the first PWM control block; and

a second PWM control block configured to use the first PWM modulator signal during a second time period to set a first operating state of the second PWM control block and to use the second PWM modulator signal to set a second operating state of the second PWM control block.

16. The power supply controller of claim 15 further including a first comparator, a second comparator, and a ramp generator configured to form a plurality of ramp signals wherein the first PWM control block selectively couples a first ramp signal to the first comparator to set the first operating state of the first PWM control block and couples the first ramp signal to the second comparator to set the second operating state of the first PWM control block.

17. The power supply controller of claim 16 further including the second PWM control block configured to selectively couple a second ramp signal to the first comparator to set the first operating state of the second PWM control block and couple the second ramp signal to the second comparator to set the second operating state of the second PWM control block.

18. The power supply controller of claim 15 wherein a ramp generator forms a separate ramp signal for the first PWM control block and the second PWM control block.

Assignments (6)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 038620, FRAME 0087 Recorded Jun 22, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064070/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT PATENT NUMBER 5859768 AND TO RECITE COLLATERAL AGENT ROLE OF RECEIVING PARTY IN THE SECURITY INTEREST PREVIOUSLY RECORDED ON REEL 038620 FRAME 0087. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Aug 25, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 039853/0001 →
SECURITY INTEREST Recorded Apr 15, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH
Reel/Frame 038620/0087 →
RELEASE OF SECURITY INTEREST Recorded Sep 4, 2014
From: JPMORGAN CHASE BANK, N.A.
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 033686/0092 →
SECURITY AGREEMENT Recorded Sep 10, 2007
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 019795/0808 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 28, 2005
From: RICE, BENJAMIN M.
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, L.L.C.
Reel/Frame 017290/0754 →