Thin film germanium diode with low reverse breakdown
View Patent ↗In fabricating an electronic structure, a substrate is provided, and a first barrier layer is provided on the substrate. A germanium thin film diode is provided on the first barrier layer, and a second barrier layer is provided on the germanium thin film diode. A memory device is provided over and connected to the second barrier layer.
1. A method of fabricating an electronic structure comprising;
providing a diode comprising germanium;
providing a barrier layer in contact with the diode; and
providing a memory device connected to the diode through the barrier layer.
2. The method of claim 1 wherein the barrier layer is provided on one side of the diode, and further comprising providing an additional barrier layer on the other side of the diode.
3. The method of claim 2 wherein the barrier layers are in contact with the germanium.
4. The method of claim 3 wherein the barrier layers are conductive layers.
5. The method of claim 4 wherein the barrier layers are tungsten layers.
6. The method of claim 5 wherein the memory device is a resistive memory device.
7. A method of fabricating an electronic structure comprising;
providing a substrate;
providing a first barrier layer on the substrate;
providing a germanium diode on the first barrier layer;
providing a second barrier layer on and in contact with the germanium diode; and
providing a memory device over and connected to the diode through the second barrier layer.
8. The method of claim 7 wherein the first and second barrier layers are tungsten barrier layers.
9. The method of claim 8 wherein the memory device is a resistive memory device.
10. An electronic structure comprising:
a diode comprising germanium;
a barrier layer in contact with the diode; and
a memory device connected to the diode through the barrier layer.
11. The structure of claim 10 and further comprising a substrate, and an additional barrier layer between the diode and the substrate.
12. The structure of claim 11 wherein the barrier layers are in contact with the germanium.
13. The structure of claim 12 wherein the barrier layers are conductive layers.
14. The structure of claim 13 wherein the barrier layers are tungsten layers.
15. The structure of claim 14 wherein the memory device is a resistive memory device.
16. The structure of claim 15 wherein the memory device comprises a pair of electrodes, and active and passive layers between the electrodes.
17. A memory array comprising;
a first plurality of conductors;
a second plurality of conductors, and;
a plurality of structures, each associated with a conductor of the first plurality thereof and a conductor of the second plurality thereof, each structure comprising;
a germanium diode;
a barrier layer in contact with the diode; and
a memory device connected to the diode through the barrier layer.
18. The memory array of claim 17 wherein each memory device is a resistive memory device.