IP Library Granted Patent US 7,312,519
Granted Patent B2
US 7,312,519 · App. 11/331,564 · Granted Dec 25, 2007

Stacked integrated circuit package-in-package system

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Quick Facts
Patent No.
US 7,312,519
App. No.
11/331,564
Granted
Dec 25, 2007
Kind
B2
Abstract

A stacked integrated circuit package-in-package system is provided forming a first device having a first integrated circuit package comprises forming a first substrate with a first integrated circuit thereon, electrically connecting first electrical interconnects between the first integrated circuit and a top side of the first substrate, encapsulating a first top molding compound to cover the first electrical interconnects and a portion of the top side of the first substrate, and encapsulating a first bottom molding compound to cover the first integrated circuit and a bottom side the first substrate, and stacking a second device, having a second integrated circuit package, below the first device with a second top molding compound of the second device providing a space between the first device and the second device, wherein the second device includes the second top molding compound and a second bottom molding compound in a similar manner to the first device.

Claims (16)

1. A stacked integrated circuit package-in-package system comprising:

a first device having a first integrated circuit package comprises:

a first substrate with a first integrated circuit thereon, the first substrate being a two layer substrate and the first integrated circuit having a first non-active side of the first integrated circuit not attached to the first substrate,

first electrical interconnects between the first integrated circuit and a top side of the first substrate, the first electrical interconnects are connected to a first active side of the first integrated circuit,

a first top molding compound to cover the first electrical interconnects and a portion of the top side of the first substrate over a portion of the first active of the first integrated circuit, and

a first bottom molding compound to cover the first integrated circuit and a bottom side of the first substrate over a first non-active side of the first integrated circuit; and

a second device, having a second integrated circuit package, below the first device with the first bottom molding compound is attached with a first adhesive layer and with a second top molding compound of the second device provided between the first device and the second device; and

further comprising:

a first opening in the first substrate, wherein the first integrated circuit on the first substrate is over the first opening, and the first opening provides space for the first electrical interconnects,

a package substrate with the second device, wherein the second device includes the second top molding compound and a second bottom molding compound attached in similar manner to the first device,

further electrical interconnects to a second top side of a second substrate of the second device, and

a package molding compound to cover the first device, the second device, the further electrical interconnects and the package substrate.

2. The system as claimed in claim 1 wherein the second device below the first device has a clearance for the first electrical interconnects.

3. The system as claimed in claim 1 further comprising an integrated circuit die below the second device.

4. The system as claimed in claim 1 wherein the first electrical interconnects comprises bond wires.

5. The system as claimed in claim 1 wherein the further electrical interconnects comprises bond wires.

Assignments (6)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 3, 2025
From: STATS CHIPPAC PTE. LTD.
To: STATS CHIPPAC MANAGEMENT PTE. LTD.
Reel/Frame 072788/0917 →
CORRECT ERROR IN ASSIGNMENT NAME FROM STATS CHIPPAC, PTE. LTE TO STATS CHIPPAC PTE. LTD (REEL: 038378 FRAME: 0319) Recorded Aug 30, 2023
From: STATS CHIPPAC PTE. LTE.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 064760/0986 →
RELEASE OF SECURITY INTEREST Recorded Jun 15, 2020
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 052938/0305 →
CHANGE OF NAME Recorded Apr 7, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038378/0319 →
SECURITY INTEREST Recorded Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 24, 2006
From: SONG, SUNGMIN; YIM, CHOONG BIN; LEE, SEONGMIN; LIM, JAEHYUN; YANG, JOUNGIN; PARK, DONGSAM
To: STATS CHIPPAC LTD.
Reel/Frame 017358/0903 →