Method for making a semiconductor multi-package module having inverted bump chip carrier second package
View Patent ↗A semiconductor multi-package module has stacked lower and upper packages, each of which includes a die attached to a substrate, in which the second package is inverted, in which the upper and lower substrates are interconnected by wire bonding, and in which the inverted second package comprises a bump chip carrier package. Also, a method for making a semiconductor multi-package module, by providing a lower molded package including a lower substrate and a die, affixing an upper bump chip carrier package including an upper substrate in inverted orientation onto the upper surface of the lower package, and forming z-interconnects between the upper and lower substrates.
1. A method for making a multi-package module, comprising
providing a first package,
providing a bump chip carrier second package, wherein the bump chip carrier or package comprises a die electrically connected to a substrate by wire bonds, and wherein the wire bonds are molded or encapsulated,
inverting the second package and stacking the second package over the first package, and
forming electrical interconnects between the first package and the second package by wire bonding.
2. The method of claim 1 wherein providing a first package comprises testing packages for a performance and reliability requirement, and identifying a package that meets said requirement as a said first package.
3. The method of claim 1 wherein providing a second package comprises testing packages for a performance and reliability requirement, and identifying a package that meets said requirement as a said second package.
4. The method of claim 1 , further comprising providing a heat spreader.
5. The method of claim 1 , further comprising attaching second-level interconnect balls onto the first package substrate.
6. The method of claim 1 , further comprising encapsulating the stacked packages on the module in a molding compound.