IP Library Granted Patent US 7,521,780
Granted Patent B2
US 7,521,780 · App. 11/354,694 · Granted Apr 21, 2009

Integrated circuit package system with heat dissipation enclosure

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,521,780
App. No.
11/354,694
Granted
Apr 21, 2009
Kind
B2
Abstract

An integrated circuit package system is provided providing an integrated circuit die, and enclosing the integrated circuit die in a heat dissipation enclosure comprises mounting the integrated circuit die on a die paddle attaching a heat block ring to the die paddle around the integrated circuit die, and attaching a heat slug on the heat block ring over the integrated circuit die.

Claims (49)

1. An integrated circuit package manufacturing method comprising:

providing an integrated circuit die; and

enclosing the integrated circuit die in a heat dissipation enclosure comprises:

mounting the integrated circuit die on a die paddle having discrete pads connected to corners of a central portion thereof,

attaching a heat block ring to the pad and around the integrated circuit die with the heat block ring having inwardly extending pads lining up over the discrete pads, and

attaching a heat slug on the heat block ring over the integrated circuit die.

2. The method as claimed in claim 1 wherein attaching the heat block ring to the die paddle around the integrated circuit die includes forming the heat block ring having a recess for an electrical interconnect connected to the integrated circuit die.

3. The method as claimed in claim 1 wherein enclosing the integrated circuit die in the heat dissipation enclosure comprises:

forming a substrate having the die paddle therein;

mounting the integrated circuit die on the die paddle; and

thermally connecting an external interconnect through the substrate and the die paddle to the integrated circuit die.

4. The method as claimed in claim 1 wherein enclosing the integrated circuit die in the heat dissipation enclosure comprises:

providing a substrate having the die paddle therein;

mounting the integrated circuit die on the die paddle;

attaching the heat block ring on the substrate around the integrated circuit die; and

thermally connecting an external interconnect through the substrate to the heat block ring.

5. The method as claimed in claim 1 further comprising encapsulating the integrated circuit die and the heat dissipation enclosure.

6. An integrated circuit package manufacturing method comprising:

providing an integrated circuit die;

enclosing the integrated circuit die in a heat dissipation enclosure comprises:

mounting the integrated circuit die on a substrate having a die paddle having discrete pads connected to corners of a central portion thereof,

attaching a heat block ring on the pad and the substrate around the integrated circuit die with the heat block ring having inwardly extending pads lining up over the discrete pads, and

attaching a heat slug on the heat block ring over the integrated circuit die; and

attaching an external interconnect to the substrate on a side opposite the heat dissipation enclosure.

7. The method as claimed in claim 6 further comprising connecting an electrical interconnect between the integrated circuit die and the substrate.

8. The method as claimed in claim 6 wherein mounting the integrated circuit die on the substrate having the die paddle includes forming the substrate having a metal layer.

9. The method as claimed in claim 6 wherein mounting the integrated circuit die on the substrate having the die paddle includes forming the substrate having an electrical via.

10. The method as claimed in claim 6 wherein enclosing the integrated circuit die in the heat dissipation enclosure includes forming the heat dissipation enclosure with a thermally conductive material.

11. An integrated circuit package system comprising:

an integrated circuit die;

a die paddle for supporting the integrated circuit die, the die paddle having discrete pads connected to corners of a central portion thereof;

a heat block ring attached to the pad and around the integrated circuit die with the heat block ring having inwardly extending pads lining up over the discrete pads; and

a heat slug on the heat block ring over the integrated circuit die for forming a heat dissipation enclosure.

12. The system as claimed in claim 11 wherein the heat block ring attached to the die paddle around the integrated circuit die includes the heat block ring having a recess for an electrical interconnect connected to the integrated circuit die.

13. The system as claimed in claim 11 further comprising:

a substrate having the die paddle therein; and

an external interconnect thermally connected though the substrate and the die paddle to the integrated circuit die.

14. The system as claimed in claim 11 further comprising:

a substrate having the die paddle therein;

the heat block ring on the substrate around the integrated circuit die; and

an external interconnect thermally connected through the substrate to the heat block ring.

15. The system as claimed in claim 11 further comprising a molding compound to cover the integrated circuit die and the heat dissipation enclosure.

16. The system as claimed in claim 11 further comprising:

a substrate having the die paddle therein; and

an external interconnect on the substrate on a side opposite the heat dissipation enclosure.

17. The system as claimed in claim 16 further comprising an electrical interconnect between the integrated circuit die and the substrate.

18. The system as claimed in claim 16 wherein the substrate has a metal layer.

19. The system as claimed in claim 16 wherein the substrate has an electrical via.

20. The system as claimed in claim 16 wherein the heat block ring and the heat slug are of a thermally conductive material.

Assignments (6)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 3, 2025
From: STATS CHIPPAC PTE. LTD.
To: STATS CHIPPAC MANAGEMENT PTE. LTD.
Reel/Frame 072788/0917 →
CORRECT ERROR IN ASSIGNMENT NAME FROM STATS CHIPPAC, PTE. LTE TO STATS CHIPPAC PTE. LTD (REEL: 038378 FRAME: 0319) Recorded Aug 30, 2023
From: STATS CHIPPAC PTE. LTE.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 064760/0986 →
RELEASE OF SECURITY INTEREST Recorded Jun 15, 2020
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 052938/0305 →
CHANGE OF NAME Recorded Apr 7, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038378/0319 →
SECURITY INTEREST Recorded Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 19, 2006
From: KIM, TAEHO; LEE, TAE KEUN
To: STATS CHIPPAC LTD.
Reel/Frame 017330/0959 →