IP Library Granted Patent US 7,466,894
Granted Patent B2
US 7,466,894 · App. 11/367,003 · Granted Dec 16, 2008

Power supply output monitor

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Quick Facts
Patent No.
US 7,466,894
App. No.
11/367,003
Granted
Dec 16, 2008
Kind
B2
Abstract

A power supply monitoring system generates a monitor signal having information on more than one aspect of the power supply output. In one example embodiment, the monitor signal may be implemented as a square wave in which the duty cycle is proportional to output current, the peak amplitude is proportional to output voltage, and the average value is equal to output power.

Claims (29)

1. A DC power supply monitoring system comprising:

a power supply controller configured to form a control signal used for regulating an output voltage on a power supply output to a desired value, the power supply controller configured to receive a first sense signal that is representative of a value of the output voltage and to receive a second sense signal that is representative of a load current supplied to a load;

a monitoring circuit configured to generate a monitor signal responsively to the first sense signal and the second sense signal, the monitor signal having a pulse waveform with information on more than one aspect of the power supply output represented in a single pulse cycle of the monitor signal wherein an amplitude and a time interval of the single pulse cycle represents the information.

2. The system of claim 1 wherein the monitoring circuit is configured to form the monitor signal and wherein the information includes load current and output voltage information for the power supply output.

3. The system of claim 2 wherein a first aspect of the monitor signal includes output voltage information; and

a second aspect of the monitor signal includes load current information.

4. The system of claim 3 wherein

the first and second aspects may be combined to provide power information.

5. The system of claim 1 wherein the monitoring circuit is configured to form the monitor signal and wherein the amplitude of the single pulse cycle represents output voltage information, a duty cycle of the single pulse cycle represents load current information, and the amplitude times the duty cycle represents power information.

6. The system of claim 1 wherein the monitoring circuit is configured to form the monitor signal and wherein the amplitude of the single pulse cycle represents the load current information, a duration of the single pulse cycle represents output voltage information, and the amplitude times the duration represents power information.

7. The system of claim 1 wherein the monitoring circuit is configured so that the monitor signal may be reconfigured by a user.

8. The system of claim 1 wherein the monitoring circuit includes an output driver to establish the amplitude of the single pulse cycle in response to an aspect of the power supply output.

9. The system of claim 8 where the output driver includes a pair of transistors arranged to switch the monitor signal between a first voltage and a second voltage.

10. The system of claim 9 further including a filter circuit coupled to the output driver.

11. The system of claim 1 wherein the monitoring circuit includes a pulse generator arranged to create pulses of the monitor signal in response to an aspect of the power supply output.

12. The system of claim 11 where the pulse generator includes a comparator having a ramp signal applied to a first input of the comparator.

13. The system of claim 12 wherein a signal having information on the aspect of the power supply output is applied to a second input of the comparator.

14. The system of claim 12 where a signal having information on the power supply output is combined with the ramp signal.

15. The system of claim 12 where a signal having information on the aspect of the power supply output is applied differentially to the first input and a second input of the comparator.

16. The system of claim 1 wherein the power supply controller is a switching power supply.

17. The system of claim 1 wherein the monitoring circuit includes first means for modulating a square wave signal with information on a first aspect of the power supply output; and

second means for modulating the square wave signal with information on a second aspect of the power supply output.

18. The system of claim 17 where the first means for modulating comprises an output driver having means for switching the square wave signal between two voltages in response to the first aspect of the power supply output.

19. The system of claim 17 where the second means for modulating comprises:

means for providing a ramp signal; and

means for comparing the ramp signal to a second signal.

20. The system of claim 19 where the second means for modulating further comprises means for modulating the ramp signal with information on the second aspect of the power supply output.

21. The system of claim 19 where the second means for modulating further comprises means for modulating the second signal with information on the second aspect of the power supply output.

22. The system of claim 19 wherein the power supply controller is a switching power supply controller.

Assignments (8)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 038620, FRAME 0087 Recorded Jun 22, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064070/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT PATENT NUMBER 5859768 AND TO RECITE COLLATERAL AGENT ROLE OF RECEIVING PARTY IN THE SECURITY INTEREST PREVIOUSLY RECORDED ON REEL 038620 FRAME 0087. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Aug 25, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 039853/0001 →
RELEASE OF SECURITY INTEREST Recorded May 6, 2016
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT AND COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 038631/0345 →
RELEASE OF SECURITY INTEREST Recorded May 6, 2016
From: JPMORGAN CHASE BANK, N.A. (ON ITS BEHALF AND ON BEHALF OF ITS PREDECESSOR IN INTEREST, CHASE MANHATTAN BANK)
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 038632/0074 →
SECURITY INTEREST Recorded Apr 15, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH
Reel/Frame 038620/0087 →
SECURITY AGREEMENT Recorded Jan 19, 2010
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 023826/0725 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 30, 2008
From: ANALOG DEVICES, INC.; ANALOG DEVICES B.V.
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 020431/0903 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 3, 2006
From: SCHIFF, TOD F.; GOLDHAMMER, RODNEY J.; REIZIK, GABOR T.
To: ANALOG DEVICES, INC.
Reel/Frame 017572/0162 →