Semiconductor package structure and method of manufacture

1. A semiconductor package having first and second opposing major surfaces comprising:

a conductive slug having an electronic chip attached to one surface;

a plurality of columnar leads in spaced relationship to the conductive slug, wherein each of the plurality of columnar leads includes a bonding projection, and wherein each of the plurality of columnar leads has a pair of opposing end faces that substantially overlap and that are substantially parallel to the first and second opposing major surfaces;

conductive connective structures electrically coupling the electronic chip to the bonding projections; and

an encapsulating layer covering portions of the conductive slug, the plurality of columnar leads, and the electronic chip, wherein at least one of the opposing end faces of each columnar leads is exposed on the first major surface, and wherein the conductive slug is exposed on the second major surface.

2. The package of claim 1 wherein another opposing end face of at least a portion of each of the plurality of columnar leads is further exposed at the second major surface.

3. The package of claim 1 wherein at least a portion of the plurality of columnar leads are each exposed in at least two places along a side surface of the package to provide mold lock structures.

4. The package of claim 1 further comprising a layer of thermally conductive and electrically insulative material formed over the second major surface.

5. The package of claim 1 wherein the columnar leads are absent exposure at the second surface of the package.

6. The package of claim 1 wherein the bonding portions are integral with the plurality of columnar leads, and wherein each bonding portion projects from one side of each columnar lead in a direction towards the conductive slug, and wherein at least one bonding portion is substantially centrally located on at least one columnar lead.

7. The package of claim 1 wherein the conductive connective structures comprise wire bonds.

8. The package of claim 1 wherein at least one of the conductive connective structures comprises a conductive clip.

9. A molded semiconductor package structure having first and second opposing major surfaces comprising:

a flag having a semiconductor device attached to one surface;

a plurality of conductive pillars in spaced relationship with the flag, wherein each conductive pillar includes a bonding extension, and wherein each conductive pillar includes a pair of opposing faces that substantially overlap and that are substantially parallel to the first and second major surfaces;

conductive connective structures electrically coupling the semiconductor device to the bonding extensions; and

an encapsulation layer covering portions of the molded semiconductor package structure, wherein at least one of the opposing faces of at least a portion of each of the plurality of conductive pillars is exposed at the first major surface, and wherein the flag is exposed at the second major surface so that the molded semiconductor package structure is configured to be mounted in a slug up orientation when the molded semiconductor package structure is attached to a next level of assembly.

10. The package of claim 9 wherein the plurality of conductive pillars are further exposed at the second major surface.

11. The package of claim 9 , wherein at least a portion of the plurality of conductive pillars are each exposed in at least two places along a side surface of the package to provide mold lock structures.

12. The package of claim 9 , wherein the plurality of conductive pillars are on only one side of the package.

13. The package of claim 9 , wherein the conductive connective structures comprise wire bonds.

14. The package of claim 9 , wherein at least one of the conductive connective structures comprises a clip.

15. The package of claim 9 further comprising a layer of thermally conductive and electrically insulative material formed over the second major surface.

16. A method of forming a molded semiconductor package structure having first and second opposing major surfaces comprising the steps of:

providing a lead frame having a flag and a plurality of conductive pillars in spaced relationship with the flag, wherein the each conductive pillar includes a bonding extension, and wherein each conductive pillar includes a pair of opposing faces that substantially overlap, and wherein the pair of opposing faces is substantially parallel to the first and second major surfaces;

attaching a semiconductor device to one surface of the flag;

attaching conductive connective structures to the semiconductor device and the bonding extensions; and

forming an encapsulation layer covering portions of the molded semiconductor package structure, wherein at least one of the opposing faces of at least a portion of the plurality of conductive pillars is exposed at the first major surface, and wherein the flag is exposed at the second major surface so that the molded semiconductor package structure is configured to be mounted in a slug up orientation when the molded semiconductor package structure is attached to a next level of assembly.

17. The method of claim 16 wherein the step of forming the encapsulation layer includes forming the encapsulation layer wherein another one of the opposing faces of at least a portion of each of the plurality of conductive pillars is further exposed at the second major surface.

18. The method of claim 16 , wherein the step of providing the lead frame includes providing a lead frame having a plurality of conductive pillars on only one side.

19. The method of claim 16 , wherein the step of attaching the conductive connective structures includes attaching with wire bonds.

20. The method of claim 16 further comprising the step of forming a thermally conductive and electrically insulative layer over the second major surface.