Opto-thermal annealing methods for forming metal gate and fully silicided gate field effect transistors
View Patent ↗An opto-thermal annealing method for forming a field effect transistor uses a reflective metal gate so that electrical properties of the metal gate and also interface between the metal gate and a gate dielectric are not compromised when opto-thermal annealing a source/drain region adjacent the metal gate. Another opto-thermal annealing method may be used for simultaneously opto-thermally annealing: (1) a silicon layer and a silicide forming metal layer to form a fully silicided gate; and (2) a source/drain region to form an annealed source/drain region. An additional opto-thermal annealing method may use a thermal insulator layer in conjunction with a thermal absorber layer to selectively opto-thermally anneal a silicon layer and a silicide forming metal layer to form a fully silicide gate.
1. A method for fabricating a field effect transistor comprising:
forming a stack layer comprising a suicide forming metal contacting a silicon layer over a semiconductor substrate, said suicide forming metal selected from the group consisting of cobalt, nickel, platinum, tungsten, titanium and their alloys;
forming a source/drain region into the semiconductor substrate while using at least the stack layer as a mask;
forming a thermal insulator layer upon the source/drain region;
forming a thermal absorber layer comprises an amorphous carbon material, upon the stack layer; and
selectively opto-thermally annealing the stack layer to form a fully silicide gate electrode while not annealing the source/drain region, said opt-thermally annealing is performed at a temperature from about 1000° to about 1400° centigrade and for a time period from about 0.01 to about 100 milliseconds.