Method for fabricating a semiconductor device
View Patent ↗The semiconductor device includes an active region, a recess, a Fin-type channel region, a gate insulating film, and a gate electrode. The active region is defined by a device isolation structure formed in a semiconductor substrate. The recess is formed by etching the active region and its neighboring device isolation structure using an island-type recess gate mask as an etching mask. The Fin-type channel region is formed on the semiconductor substrate at a lower part of the recess. The gate insulating film is formed over the active region including the Fin-type channel region and the recess. The gate electrode is formed over the gate insulating film to fill up the Fin-type channel region and the recess.
1. A method for fabricating a semiconductor device comprising:
(a) forming a device isolation structure in a semiconductor substrate to define an active region having a pad insulating film;
(b) etching the pad insulating film to expose the semiconductor substrate;
(c) etching a predetermined thickness of the exposed semiconductor substrate using an island shaped recess gate mask to form a first recess and a second recess, wherein a Fin channel region is formed at a lower part of the second recess, the etching of the predetermined thickness comprising:
(c-1) forming a first insulating film over the exposed semiconductor substrate and a first hard mask layer over the first insulating film and the device isolation structure;
(c-2) etching a predetermined region of the first hard mask layer, the first insulating film, the semiconductor substrate and the device isolation structure using the island shaped recess gate mask to form the first recess defining a recess channel region;
(c-3) removing the first hard mask layer;
(c-4) forming a spacer on a sidewall of the first recess;
(c-5) isotropically etching the semiconductor substrate exposed at the lower part of the first recess to form the second recess;
(c-6) isotropically etching the device isolation structure exposed at the lower part of the second recess in a longitudinal direction of the gate region to form a Fin channel region; and
(c-7) removing the spacer and the first insulating film to expose the semiconductor substrate;
(d) forming a gate insulating film over the active region including the Fin channel region, the first recess, and the second recess;
(e) forming a gate conductive layer filling up the Fin channel region, the first recess, and the second recess;
(f) forming a gate hard mask layer over the gate conductive layer; and
(g) patterning the gate hard mask layer and the gate conductive layer using a gate mask as an etching mask to form a gate structure.
2. The method according to claim 1 , wherein step (a) includes:
(a-1) etching the semiconductor substrate having the pad insulating film using a device isolation mask as an etching mask to form a trench; and
(a-2) forming a device isolation structure defining the active region, wherein the device isolation structure fills the trench.
3. The method according to claim 2 , further comprising forming a stacked structure of a thermal oxide film, a liner nitride film, and a liner oxide film at an interface between the trench and the device isolation structure.
4. The method according to claim 2 , wherein the device isolation structure includes a stacked structure of a first oxide film for device isolation and a second oxide film for device isolation, etching rates of which are relatively different.
5. The method according to claim 1 , wherein the island shaped recess gate mask includes a closed polygon.
6. The method according to claim 5 , wherein the closed polygon recess gate mask is elliptical or rectangular.
7. The method according to claim 6 , wherein in a longitudinal direction of the active region, a width of the recess gate mask is less than a width of the gate electrode by a distance 2D, and in a longitudinal direction of the gate electrode, a length of the recess gate mask is greater than a width of the active region by a distance 2E (where 0<D <( 1 / 3 )F, 0<E <( 1 / 2 )F, and a distance F is the distance between neighboring gate regions).
8. The method according to claim 1 , wherein the first insulating film includes a stacked structure of a first oxide film and a second oxide film.
9. The method according to claim 1 , wherein the first hard mask layer is selected from the group consisting of a nitride film, a polysilicon film, a amorphous Carbon film, a SiON film, and combinations thereof.
10. The method according to claim 1 , further comprising: forming a photoresist film pattern exposing a recess gate region over the first hard mask layer; etching a predetermined region of the first hard mask layer, the first insulating film, the semiconductor substrate, and the device isolation structure using the photoresist film pattern as an etching mask to form the first recess defining the recess channel region; and removing the photoresist film pattern.
11. The method according to claim 1 , further comprising: forming a first photoresist film pattern defining the gate region over the first hard mask layer; etching a predetermined thickness of the first hard mask layer using the first photoresist film pattern as an etching mask; removing the first photoresist film pattern; forming a second photoresist film pattern defining the recess gate region over the remaining first hard mask layer; etching the remaining first hard mask layer, the first insulating film, the semiconductor substrate, and the device isolation structure using the second photoresist film pattern as an etching mask to form a first recess defining a recess channel region; and removing the second photoresist film pattern.
12. The method according to claim 1 , further comprising: forming a second insulating film at a surface of the first recess; and etching the second insulating film by a dry etching method to form the spacer on a sidewall of the recess.
13. The method according to claim 12 , wherein the second insulating film is selected from the group consisting of an oxide film, a nitride film, and combination thereof
14. The method according to claim 1 , wherein in a longitudinal direction of the active region, a shape of a lower part of the second recess is elliptical or circular.
15. The method according to claim 1 , wherein the removing process for the spacer and the first insulating film is performed by a wet etching method.