IP Library Granted Patent US 7,579,892
Granted Patent B2
US 7,579,892 · App. 11/441,328 · Granted Aug 25, 2009

Accurate timing generator and method therefor

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Quick Facts
Patent No.
US 7,579,892
App. No.
11/441,328
Granted
Aug 25, 2009
Kind
B2
Abstract

In one embodiment, a reference generator forms a reference signal that may have temperature and process variations. A comparator that has similar variations is used to detect a signal using the reference.

Claims (30)

1. A method of forming a timing generator comprising:

coupling a first transistor to form a first reference voltage having a value that is a function of a threshold voltage of the first transistor;

configuring the timing generator to use the first reference voltage to form a charging current that is representative of the first reference voltage;

coupling a capacitor to be charged by the charging current and form a first time varying signal;

configuring a comparator to have a threshold value that tracks the threshold voltage of the first transistor; and

coupling the comparator to compare the first time varying signal to the threshold value of the comparator and responsively form a control signal.

2. The method of claim 1 further including coupling a voltage to current converter to form a first reference current that is representative of the first reference voltage.

3. The method of claim 2 further including coupling a resistor to an output of the voltage to current converter wherein the first reference current flows through the resistor.

4. The method of claim 2 wherein coupling the voltage to current converter includes coupling an operational amplifier to receive the first reference voltage and coupling a second transistor to receive an output of the operational amplifier.

5. The method of claim 2 further including coupling a current mirror to receive the first reference current and form the charging current so that the charging current is ratioed to the first reference current.

6. The method of claim 1 wherein coupling the comparator to compare the first time varying signal includes configuring a second transistor to have a threshold voltage that tracks the threshold voltage of the first transistor.

7. The method of claim 6 further including coupling a control electrode of the second transistor to receive the first time varying signal.

8. A method of forming a timing generator comprising:

coupling a first transistor to form a first reference signal having a value that is a function of a threshold value of the first transistor;

coupling a capacitor to be charged by the first reference signal and form a first time varying signal;

configuring a comparator to have a threshold value that tracks the threshold value of the first transistor including configuring the threshold value of the comparator to substantially cancel an effect of a dependence of the threshold value of the first reference signal so that the asserted time of the control signal is not dependent on the threshold value of the comparator or the threshold value of the first transistor; and

coupling the comparator to compare the first time varying signal to the threshold value of the comparator and responsively form a control signal.

9. A timing generator comprising:

a first transistor having a first threshold voltage, a first current carrying electrode, and having a control electrode coupled to a second current carrying electrode;

a voltage to current converter coupled to the second current carrying electrode of the first transistor, the voltage to current converter configured to form a current that is representative of a voltage received from the first transistor;

a capacitor coupled to receive a charging current that is representative of the current from the voltage to current converter and form a time dependent signal;

a second transistor formed to have a second threshold voltage that tracks the first threshold voltage, a first current carrying electrode, a second current carrying electrode, and a control electrode coupled to receive the time dependent signal; and

a third transistor having a third threshold voltage, a control electrode coupled to receive a bias voltage, a first current carrying electrode coupled to the second current carrying electrode of the first transistor, and a second current carrying electrode coupled to receive an input voltage.

10. The timing generator of claim 9 wherein the capacitor includes a first terminal coupled to the control electrode of the second transistor and a second terminal coupled to a voltage return.

11. The timing generator of claim 10 further including a fourth transistor having a first current carrying electrode connected to the first terminal of the capacitor, a second current carrying electrode coupled to a second terminal of the capacitor, and a control electrode coupled to receive a discharge signal from external to the timing generator.

12. The timing generator of claim 9 wherein the voltage to current converter includes a operational amplifier having an inverting input, a non-inverting input coupled to the second current carrying electrode of the first transistor, and an output; and a fourth transistor having a first current carrying electrode, a control electrode coupled to the output of the operational amplifier, and a second current carrying electrode coupled to the inverting input of the operational amplifier.

13. The timing generator of claim 12 further including a resistor having a first terminal coupled to the second current carrying electrode of the fourth transistor, and a second terminal coupled to a voltage return.

14. The timing generator of claim 9 further including a current mirror coupled to receive the current from the voltage to current converter and responsively form the charging current.

15. The timing generator of claim 14 wherein the current mirror includes a fourth transistor having a control electrode and a first current carrying electrode to receive the current from the voltage to current converter, and a second current carrying electrode coupled to receive an input voltage; and a fifth transistor having a first current carrying electrode coupled to supply the charging current to the capacitor, a second current carrying electrode coupled to receive the input voltage, and a control electrode coupled to the control electrode of the fourth transistor.

16. The timing generator of claim 9 further including a fourth transistor having a fourth threshold voltage that tracks the third threshold voltage, a control electrode coupled to receive the bias voltage, a first current carrying electrode coupled to receive the input voltage, and a second current carrying electrode coupled to the second current carrying electrode of the second transistor.

Assignments (6)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 038620, FRAME 0087 Recorded Jun 22, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064070/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT PATENT NUMBER 5859768 AND TO RECITE COLLATERAL AGENT ROLE OF RECEIVING PARTY IN THE SECURITY INTEREST PREVIOUSLY RECORDED ON REEL 038620 FRAME 0087. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Aug 25, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 039853/0001 →
SECURITY INTEREST Recorded Apr 15, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH
Reel/Frame 038620/0087 →
RELEASE OF SECURITY INTEREST Recorded Sep 4, 2014
From: JPMORGAN CHASE BANK, N.A.
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 033686/0092 →
SECURITY AGREEMENT Recorded Sep 10, 2007
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 019795/0808 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 26, 2006
From: KADANKA, PETR
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, L.L.C.
Reel/Frame 017939/0327 →