Integrated circuit package system with filled wafer recess
View Patent ↗An integrated circuit package system is provided including forming a wafer having a back side and an active side, forming a recess in the wafer from the back side, forming a cover in the recess, and singulating the wafer at the recess filled with the cover.
1. A method of manufacture of an integrated circuit package system comprising:
forming a wafer having a back side and an active side;
forming interconnects to the active side of the wafer;
forming a recess in the back side of the wafer with the interconnects attached;
filling the recess exclusively and completely with cover and with a central region of the back side exposed to ambient; and
singulating the wafer at the recess filled with the cover.
2. The method as claimed in claim 1 wherein forming the interconnects include attaching the interconnects on the active side.
3. The method as claimed in claim 1 wherein forming the cover includes covering the back side.
4. The method as claimed in claim 1 wherein forming the cover includes exposing the back side.
5. The method as claimed in claim 1 wherein forming the recess includes forming a vertical segment or a sloped segment in the wafer from the back side.
6. A method of manufacture of an integrated circuit package system comprising:
forming a wafer having a back side and an active side;
thinning the wafer from the back side;
forming interconnects to the active side of the wafer;
forming a recess in the back side of the wafer with the interconnects attached;
filling the recess exclusively and completely with cover and with a central region of the back side exposed to ambient; and
singulating the wafer at the recess filled with the cover.
7. The method as claimed in claim 6 wherein forming the interconnects includes attaching the interconnects on the active side.
8. The method as claimed in claim 6 wherein forming the cover includes filling a peripheral region from the back side with the cover.
9. The method as claimed in claim 6 wherein forming the cover includes filling a peripheral region from the back side and over the back side with the cover.
10. The method as claimed in claim 6 wherein forming the cover includes forming the cover comprised of a material having planar rigidity.
11. An integrated circuit package system comprising:
an integrated circuit die, having an active side and a back side, with a recess from the back side;
interconnects attached on the active side of the integrated circuit die; and
a cover to exclusively and completely fill the recess and with a central region of the backside exposed to ambient.
12. The system as claimed in claim 11 wherein the interconnects on the active side include solder balls.
13. The system as claimed in claim 11 wherein the cover to fill the recess is over the back side.
14. The system as claimed in claim 11 wherein the cover to fill the recess has a portion of the back side exposed.
15. The system as claimed in claim 11 wherein the recess has a vertical segment or a sloped segment.
16. The system as claimed in claim 11 wherein the integrated circuit die, having the active side and the back side, with the recess from the back side has a metal layer.
17. The system as claimed in claim 16 wherein the interconnects on the active side include solder balls.
18. The system as claimed in claim 16 wherein the cover to fill the recess is along the peripheral region from the back side.
19. The system as claimed in claim 16 wherein the cover is over a peripheral region from the back side and over the back side.
20. The system as claimed in claim 16 wherein the cover is comprised of a material having planar rigidity.