Semiconductor device using EPI-layer and method of forming the same
View Patent ↗A method of fabricating a semiconductor device includes forming a pad oxide film and a nitride film on a semiconductor substrate; exposing the semiconductor substrate by selectively etching the pad oxide film and the nitride film; forming a trench in the exposed semiconductor substrate; forming a gap-fill dielectric film in the trench; exposing an active area of the semiconductor substrate by removing the pad oxide film and the nitride film; forming an epitaxial layer including a dopant in the exposed active area; forming a gate electrode on the epitaxial layer; and forming source and drain regions in the active area beside the gate electrode. The semiconductor device can prevent surface damage of a semiconductor substrate, may occur when performing ion implantation for threshold voltage control, and does not require annealing after ion implantation. Additionally, the semiconductor device can enhance an isolation effect by protecting an oxide film in a corner portion of the STI, to prevent an occurrence of a moat phenomenon in the STI, and to prevent the damage of the gap-fill dielectric film.
1. A method of forming a semiconductor device, comprising the steps of:
forming a pad oxide film and a nitride film on a semiconductor substrate;
exposing the semiconductor substrate by selectively etching the pad oxide film and the nitride film;
forming a trench in the exposed semiconductor substrate;
forming a gap-fill dielectric film in the trench;
removing the nitride film by wet etching;
forming a plurality of ion implantation regions by performing a well ion implantation, a channel-stop ion implantation, and a punch through ion implantation into the semiconductor substrate after forming the gap-fill dielectric;
exposing an active area of the semiconductor substrate by removing the pad oxide film;
forming an epitaxial layer containing a dopant in the exposed active area by epitaxial growth, the epitaxial layer interfacing with the gap-fill dielectric film and containing sufficient dopant to control a threshold voltage of the semiconductor device;
forming a gate conductive layer on a gate dielectric film on the epitaxial layer;
forming a gate electrode by patterning the gate conductive layer; and
forming a source region and a drain region in the active area beside the gate electrode.
2. The method of claim 1 , wherein forming the epitaxial layer comprises a SEG (Selective Epitaxial Growth) process, such that the epitaxial layer surrounds the gap-fill dielectric film.
3. The method of claim 1 , further comprising the step of forming a liner oxide film having a thickness of 100˜250 Å inside the trench, after forming the trench.
4. The method of claim 1 , wherein forming the epitaxial layer comprises forming a first epitaxial layer doped with a P-type dopant in an NMOS region of the substrate, and forming a second epitaxial layer doped with an N-type dopant in a PMOS region of the substrate.
5. The method of claim 4 , wherein forming a first epitaxial layer doped with a P-type dopant comprises introducing a P-type dopant precursor into the epitaxy atmosphere and/or chamber during the epitaxial growth process.
6. The method of claim 4 , wherein forming a first epitaxial layer doped with an N-type dopant comprises introducing an N-type dopant precursor into the epitaxy atmosphere and/or chamber during the epitaxial growth process.
7. The method of claim 6 , wherein said P-type dopant precursor comprises one or more compound(s) selected from the group consisting of B 2 H 6 , B 5 H 9 , B 6 H 10 , or (H 3 Si) x -BH y , where 1≦x≦3, and x+y=3.
8. The method of claim 6 , wherein said N-type dopant precursor comprises one or more compound(s) selected from the group consisting of PH 3 or (H 3 Si) x PH y , where 1≦x≦3, and x+y=3.