Modified gold-tin system with increased melting temperature for wafer bonding
View Patent ↗A semiconductor structure and a bonding method are disclosed that includes a device wafer, a substrate wafer, and a metal bonding system between the device wafer and the substrate wafer. The metal bonding system includes gold, tin, and nickel, and includes at least one discrete layer of gold and tin that is at least about 88 percent gold by weight.
1. A semiconductor structure comprising:
a device wafer;
a substrate wafer; and
a metal bonding system between said device wafer and said substrate wafer; said metal bonding system comprising gold, tin, and nickel, and including at least one discrete layer of gold and tin that is at least about 88 percent gold by weight.
2. A semiconductor structure according to claim 1 wherein said metal bonding system includes at least one discrete layer of a combination of nickel, gold and tin adjacent said at least 88 percent gold discrete layer, with tin being present in said discrete nickel-gold-tin layer in an amount of about 40 percent by weight.
3. A semiconductor structure according to claim 2 comprising at least two of said discrete layers of nickel gold and tin separated by said 88 percent gold discrete layer.
4. A semiconductor structure according to claim 1 wherein said device wafer includes at least one epitaxial layer.
5. A semiconductor structure according to claim 4 wherein said epitaxial layer is a Group III nitride.
6. A semiconductor structure according to claim 1 wherein said device wafer includes a substrate selected from the group consisting of silicon carbide and sapphire.
7. A semiconductor structure according to claim 1 comprising a plurality of discrete gold-tin layers each of which is at least about 88 percent gold by weight.
8. A semiconductor structure according to claim 7 wherein all of said discrete gold-tin layers are at least about 88 percent gold by weight.
9. A semiconductor structure according to claim 1 wherein the overall metal bonding system is greater than 50 percent by weight gold.
10. A semiconductor structure comprising:
a device wafer;
a substrate wafer; and
a metal bonding system between said device wafer and said substrate wafer, said metal bonding system comprising a discrete layer of gold and tin that predominates in gold by weight and that demonstrates melting temperatures exceeding 350° C.
11. A semiconductor structure according to claim 10 wherein said metal bonding system further comprises at least one discrete layer of a combination of nickel, gold and tin that demonstrates melting temperatures exceeding 350° C.
12. A semiconductor structure according to claim 11 comprising at least two of said nickel, gold and tin layers separated by said gold predominating layer.
13. A semiconductor structure according to claim 10 wherein said device wafer includes at least one epitaxial layer.
14. A semiconductor structure according to claim 13 wherein said epitaxial layer is a Group III nitride.
15. A semiconductor structure according to claim 10 wherein said device wafer includes a substrate selected from the group consisting of silicon carbide and sapphire.
16. A semiconductor structure according to claim 10 comprising a plurality of discrete gold-tin layers each of which is at least about 88 percent gold by weight.
17. A semiconductor structure according to claim 16 wherein all of said discrete gold-tin layers are at least about 88 percent gold by weight.
18. A light emitting diode comprising:
a device portion;
a substrate portion; and
a metal bonding system between said device portion and said substrate portion, said metal bonding system including at least one layer of gold-tin alloy in which gold is present in an amount of at least about 88 percent by weight.
19. A light emitting diode according to claim 18 wherein the overall metal bonding system is greater than 50 percent by weight gold.
20. A light emitting diode according to claim 18 comprising a plurality of layers of gold-tin alloy in which gold is present in an amount of at least about 88 percent by weight.
21. A light emitting diode according to claim 18 wherein all of said gold-tin layers are at least about 88 percent gold by weight.
22. A light emitting diode according to claim 18 wherein said device portion comprises epitaxial layers of semiconductor material.
23. A light emitting diode according to claim 22 further comprising a device substrate material on said epitaxial layers.
24. A light emitting diode according to claim 22 wherein said epitaxial layers comprise Group III nitride materials.
25. A light emitting diode according to claim 22 wherein said device substrate material is selected from the group consisting of silicon carbide and sapphire.