IP Library Granted Patent US 7,948,033
Granted Patent B2
US 7,948,033 · App. 11/671,514 · Granted May 24, 2011

Semiconductor device having trench edge termination structure

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Quick Facts
Patent No.
US 7,948,033
App. No.
11/671,514
Granted
May 24, 2011
Kind
B2
Abstract

In one embodiment, a device is formed in a region of semiconductor material. The device includes active cell trenches and termination trenches each having doped sidewall surfaces that compensate the region of semiconductor material during reverse bias conditions to form a superjunction structure. The termination trenches include a trench fill material that enhances depletion region spread during reverse bias conditions.

Claims (61)

1. A superjunction semiconductor device comprising:

a semiconductor substrate having a surface configured to form a first electrode;

a region of semiconductor material formed in spaced relationship with the semiconductor substrate and having an active region and a termination region, the region of semiconductor material having a first conductivity type and a first charge density;

an active device formed in the active region, wherein the active device comprises:

first and second trenches formed in the region of semiconductor material, wherein the first and second trenches have sidewall surfaces;

first doped regions of a second conductivity type opposite the first conductivity type formed along at least portions of the sidewall surfaces of the first and second trenches, wherein the first doped regions have a second charge density configured to balance the first charge density to form a superjunction structure;

a base region of the second conductivity type formed in the region of semiconductor material between the first and second trenches;

a source region of the first conductivity type formed in the base region;

a first insulated control electrode adjacent the base region and the source region and configured to control current flow between the source region and the first electrode; and

a first trench fill material formed within the first and second trenches; and

a termination structure formed in the termination region, wherein the termination structure comprises:

a plurality of termination trenches formed in the body of semiconductor material and extending to the semiconductor substrate, wherein each of the plurality of termination trenches has second doped regions of the second conductivity type formed along sidewall surfaces, wherein the second doped regions have the second charge density configured to balance the first charge density;

a second trench fill material formed within the plurality of termination trenches, wherein the second trench fill material comprises a material that is configured to allow a depletion region to spread through at least a portion of the plurality of termination trenches; and

an insulating layer formed overlying the termination structure and configured so that the second trench fill material within the plurality of termination trenches and the second doped regions are floating.

2. The device of claim 1 , wherein the first and second trench fill materials comprises the same material.

3. The device of claim 1 , wherein the first and second trench fill materials comprise different materials.

4. The device of claim 3 , wherein the first trench fill material comprises a dielectric material, and wherein the second the trench fill material comprises a semiconductor material.

5. The device of claim 4 , wherein the second trench fill material comprises a polycrystalline semiconductor material.

6. The device of claim 4 , wherein the second trench fill material comprises a single crystal semiconductor material.

7. The device of claim 1 , wherein each of the first doped regions and each of the second doped regions have substantially equivalent charge densities.

8. The device of claim 1 , further comprising a field plate overlying the insulating layer and only a portion of the plurality of termination trenches.

9. The device of claim 1 , wherein the second doped regions extend along an entire length of the sidewalls of the plurality of termination trenches.

10. The device of claim 1 , wherein the first and second trenches comprise striped shaped trenches, and wherein the plurality of termination trenches comprise concentric rings laterally surrounding the first and second trenches.

11. The device of claim 1 further comprising a terminating junction of the second conductivity type formed in the body of semiconductor material between the second trench and an innermost termination trench, and wherein outermost termination trenches are formed devoid of any terminating junctions between them.

12. The device of claim 11 further comprising a second insulated control electrode adjacent the termination junction, and wherein the termination junction is electrically coupled to the source region.

13. The device of claim 1 , wherein an outer edge of an innermost termination trench is spaced apart from an inner edge of a second innermost termination trench a distance between about five micrometers and about nine micrometers, and wherein the innermost termination trench has a width between about two micrometers and five micrometers.

14. A superjunction semiconductor device comprising:

a semiconductor substrate having a surface configured to form a first electrode;

a region of semiconductor material formed in spaced relationship with the semiconductor substrate and having an active region and a termination region, the region of semiconductor material having a first conductivity type and a first charge density;

an active device formed in the active region, wherein the active device comprises:

first and second trenches formed in the region of semiconductor material, wherein the first and second trenches have sidewall surfaces;

first doped regions of a second conductivity type opposite the first conductivity type formed along at least portions of the sidewall surfaces of the first and second trenches, wherein the first doped regions have a second charge density configured to balance the first charge density to form a superjunction structure;

a base region of the second conductivity type formed in the region of semiconductor material between the first and second trenches;

a source region of the first conductivity type formed in the base region;

a first insulated control electrode adjacent the base region and the source region and configured to control current flow between the source region and the first electrode; and

a first trench fill material formed within the first and second trenches, wherein the first trench fill material comprises a dielectric material; and

a termination structure formed in the termination region, wherein the termination structure comprises:

a plurality of termination trenches formed in the body of semiconductor material and extending to the semiconductor substrate, wherein each of the plurality of termination trenches has second doped regions of the second conductivity type formed along sidewall surfaces, wherein the second doped regions have the second charge density configured to balance the first charge density;

a second trench fill material formed within the plurality of termination trenches, wherein the second trench fill material comprises a semiconductor material, and wherein the second trench fill material is formed absent a material that would impede depletion region spread through at least a portion of the plurality of termination trenches when the superjunction semiconductor is in operation; and

an insulating layer formed overlying the termination structure and configured so that the second trench fill material within plurality of termination trenches and the second doped regions are floating.

15. The device of claim 14 further comprising a terminating junction of the second conductivity type formed in the body of semiconductor material between the second trench and an innermost termination trench.

16. The device of claim 15 further comprising a second insulated control electrode adjacent the termination junction, and wherein the termination junction is electrically coupled to the source region.

17. The device of claim 14 , wherein the second trench fill material comprises a lightly doped semiconductor material having a dopant concentration between about two to about three orders of magnitude less than that of the region of semiconductor material.

18. A superjunction semiconductor device comprising:

a semiconductor substrate having a surface configured to form a first electrode;

a region of semiconductor material formed in spaced relationship with the semiconductor substrate and having an active region and a termination region, the region of semiconductor material having a first conductivity type and a first charge density;

an active device formed in the active region, wherein the active device comprises:

first and second trenches formed in the region of semiconductor material, wherein the first and second trenches have sidewall surfaces;

first doped regions of a second conductivity type opposite the first conductivity type formed along at least portions of the sidewall surfaces of the first and second trenches, wherein the first doped regions have a second charge density configured to balance the first charge density to form a superjunction structure;

a base region of the second conductivity type formed in the region of semiconductor material between the first and second trenches;

a source region of the first conductivity type formed in the base region;

a first insulated control electrode adjacent the base region and the source region and configured to control current flow between the source region and the first electrode; and

a first trench fill material formed within the first and second trenches; and

a termination structure formed in the termination region, wherein the termination structure comprises:

a plurality of termination trenches formed in the body of semiconductor material and extending to the semiconductor substrate, wherein each of the plurality of termination trenches is continuous and each has second doped regions of the second conductivity type formed along sidewall surfaces, wherein the second doped regions have the second charge density configured to balance the first charge density;

a second trench fill material formed within the plurality of termination trenches, wherein the second trench fill material comprises single crystal semiconductor material that is devoid of dielectric material; and

an insulating layer formed overlying the termination structure and configured so that the second trench fill material within plurality of termination trenches and the second doped regions are floating.

19. The device of claim 18 further comprising:

a terminating junction of the second conductivity type formed in the body of semiconductor material between the second trench and an innermost termination trench; and

a second insulated control electrode adjacent the termination junction, and wherein the termination junction is electrically coupled to the source region.

20. The device of claim 18 , wherein the semiconductor substrate comprises the first conductivity type.

Assignments (6)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 038620, FRAME 0087 Recorded Jun 22, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064070/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT PATENT NUMBER 5859768 AND TO RECITE COLLATERAL AGENT ROLE OF RECEIVING PARTY IN THE SECURITY INTEREST PREVIOUSLY RECORDED ON REEL 038620 FRAME 0087. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Aug 25, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 039853/0001 →
SECURITY INTEREST Recorded Apr 15, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH
Reel/Frame 038620/0087 →
RELEASE OF SECURITY INTEREST Recorded Sep 4, 2014
From: JPMORGAN CHASE BANK, N.A.
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 033686/0092 →
SECURITY AGREEMENT Recorded Sep 10, 2007
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 019795/0808 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 6, 2007
From: HOSSAIN, ZIA
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 018856/0349 →