Method for integrating liner formation in back end of line processing
View Patent ↗A method for integrating cap liner formation in back-end-of-line (BEOL) processing of a semiconductor device includes forming a trench structure within an insulating layer of the semiconductor device, depositing a first liner material over a top surface of the insulating layer, including sidewall and bottom surfaces of the trench, and partially filling the trench with a wiring metal material to a height corresponding to a final intended line height. A second liner material is over the wiring metal material, and a sacrificial fill material is formed over the second liner material. The sacrificial fill is planarized down to the level of the second liner material over the wiring metal material partially filling the trench, wherein a remaining portion of the second liner material defines a cap liner of the wiring metal.
1. A method for integrating cap liner formation in back-end-of-line (BEOL) processing of a semiconductor device, the method comprising:
forming a trench within an insulating layer of the semiconductor device;
depositing a first liner material over a top surface of the insulating layer, including sidewall and bottom surfaces of the trench;
partially filling the trench with a wiring metal material, to a height corresponding to a final intended line height;
depositing a second liner material over the wiring metal material;
forming a sacrificial fill material over the second liner material; and
planarizing the sacrificial fill material down to the level of the second liner material over the wiring metal material partially filling the trench, at the final intended line height, thereby completely removing the sacrificial fill material;
wherein a remaining portion of the second liner material defines a cap liner of the wiring metal.
2. The method of claim 1 , wherein the partial fill of the trench with the wiring metal material is implemented through chemical vapor deposition.
3. The method of claim 1 , wherein the partial fill of the trench with the wiring metal material is implemented through a combination of chemical vapor deposition and plating.
4. The method of claim 1 , wherein the wiring metal fill material and sacrificial fill material comprise copper.
5. The method of claim 1 , wherein the first and second liner materials comprise one or more of tantalum, tantalum nitride and titanium nitride.
6. The method of claim 1 , wherein the sacrificial fill material comprises copper, formed through one of: chemical vapor deposition and a combination of chemical vapor deposition and plating.
7. The method of claim 1 , wherein a portion of the sacrificial fill material remains within the trench.
8. The method of claim 1 , further comprising rounding edges of the trench prior to the partial filling thereof.
9. The method of claim 1 , further comprising recessing a portion of the wiring metal material prior to depositing the second liner material.
10. The method of claim 1 , further comprising partially planarizing the wiring metal material prior to depositing the second liner material.
11. A method for integrating cap liner formation in back-end-of-line (BEOL) processing of a semiconductor device, the method comprising:
forming a trench within an insulating layer of the semiconductor device;
depositing a first liner material over a top surface of the insulating layer, including sidewall and bottom surfaces of the trench;
partially filling the trench with a wiring metal material, to a height corresponding to a final intended line height, the wiring metal material also being formed over horizontal surfaces of the insulating layer above the trench;
depositing a second liner material over the wiring metal material;
forming a sacrificial fill material over the second liner material; and
planarizing the sacrificial fill material down to the level of the second liner material over the wiring metal material partially filling the trench by chemical mechanical polishing (CMP), at the final intended line height, thereby completely removing the sacrificial fill material;
wherein a remaining portion of the second liner material following the CMP defines a cap liner of the wiring metal.
12. The method of claim 11 , wherein the partial fill of the trench with the wiring metal material is implemented entirely through chemical vapor deposition.
13. The method of claim 11 , wherein the partial fill of the trench with the wiring metal material is implemented through a combination of chemical vapor deposition and plating.
14. The method of claim 11 , wherein the wiring metal fill material and sacrificial fill material comprise copper.
15. The method of claim 11 , wherein the first and second liner materials comprise one or more of tantalum, tantalum nitride and titanium nitride.
16. The method of claim 11 , wherein the sacrificial fill material comprises copper, formed through one of: chemical vapor deposition and a combination of chemical vapor deposition and plating.
17. The method of claim 11 , wherein a portion of the sacrificial fill material remains within the trench.
18. The method of claim 11 , further comprising rounding edges of the trench prior to the partial filling thereof.
19. The method of claim 11 , further comprising recessing a portion of the wiring metal material prior to depositing the second liner material.
20. The method of claim 11 , further comprising partially planarizing the wiring metal material prior to depositing the second liner material.