IP Library Granted Patent US 7,598,123
Granted Patent B2
US 7,598,123 · App. 11/681,500 · Granted Oct 6, 2009

Semiconductor component and method of manufacture

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Quick Facts
Patent No.
US 7,598,123
App. No.
11/681,500
Granted
Oct 6, 2009
Kind
B2
Abstract

A semiconductor component comprising two stacked semiconductor dice and a method of manufacture. A leadframe having an active area that includes leadframe leads and a cavity is mounted to a support material such as an adhesive tape. A packaged semiconductor die that includes a first semiconductor die mounted to a support structure and encapsulated within a mold compound is mounted on the adhesive tape. A second semiconductor die is mounted to the packaged semiconductor die. Bond pads on the second semiconductor die are electrically connected to the leadframe, the support structure on which the first semiconductor die is mounted, or both. A mold compound is formed around the second semiconductor die, portions of the leadframe, and the packaged semiconductor die. The adhesive tape is removed and the leadframe is singulated to form multi-chip packages.

Claims (35)

1. A method for manufacturing a semiconductor component, comprising:

providing a packaged semiconductor die which includes a first semiconductor die mounted to a first support and a first protective material covering a portion of the first semiconductor die and a portion of the first support;

mounting a second support to a temporary support;

mounting the packaged semiconductor die to the temporary support; and

mounting a second semiconductor die to the packaged semiconductor die.

2. The method of claim 1 , wherein the second semiconductor die has one or more bond pads.

3. The method of claim 2 , further including electrically coupling a first bond pad of the one or more bond pads to the first support.

4. The method of claim 1 , further including coupling a second bond pad of the one or more bond pads to the second support.

5. The method of claim 1 , further including coupling the first semiconductor die to the second support.

6. The method of claim 1 , wherein the temporary support is a polymeric material.

7. The method of claim 1 , wherein the second support is a leadframe.

8. A method for manufacturing a semiconductor component, comprising:

mounting a support on a temporary support;

providing a packaged semiconductor die which includes a first semiconductor die mounted to a first support and a first protective material covering a portion of the first semiconductor die and a portion of the first support;

mounting the packaged semiconductor die to the temporary support;

mounting a second semiconductor die over the packaged semiconductor die; and

forming a protective material over a portion of the second semiconductor die and the packaged semiconductor die.

9. The method of claim 8 , wherein mounting the support on the temporary support comprises mounting a first leadframe on the temporary support and further including coupling the second semiconductor die to a first portion of the first leadframe.

10. The method of claim 9 , further including coupling the packaged semiconductor die to a second portion of the first leadframe.

11. The method of claim 8 , wherein the first contact structure comprises a portion of a second leadframe.

12. The method of claim 8 , wherein the material and the protective material comprise a mold compound.

13. The method of claim 9 , further including mounting a third semiconductor die to the packaged semiconductor die and wherein forming the protective material includes forming the protective material over a portion of the third semiconductor die.

14. The method of claim 13 , further including coupling the third semiconductor die to a third portion of the first leadframe.

15. The method of claim 8 , wherein the material comprises an electrically conductive clip.

16. The method of claim 8 , wherein mounting a second semiconductor die over the packaged semiconductor die comprises:

mounting the second semiconductor die to a substrate; and

mounting the substrate to the packaged semiconductor die.

17. The method of claim 16 , wherein the substrate is a printed circuit board.

18. A semiconductor component, comprising:

a support mounted on a temporary support;

a packaged semiconductor die which includes a first semiconductor die mounted to a first support and a first protective material covering a portion of the first semiconductor die and a portion of the first support mounted on the temporary support;

a second semiconductor die over the material; and

a protective material over a portion of the second semiconductor die and the first protective material.

19. The semiconductor component of claim 18 , wherein a packaging material of the packaged semiconductor die and a material of the protective material are mold compounds.

20. The method of claim 18 , wherein the support is a leadframe.

Assignments (6)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 038620, FRAME 0087 Recorded Jun 22, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064070/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT PATENT NUMBER 5859768 AND TO RECITE COLLATERAL AGENT ROLE OF RECEIVING PARTY IN THE SECURITY INTEREST PREVIOUSLY RECORDED ON REEL 038620 FRAME 0087. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Aug 25, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 039853/0001 →
SECURITY INTEREST Recorded Apr 15, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH
Reel/Frame 038620/0087 →
RELEASE OF SECURITY INTEREST Recorded Sep 4, 2014
From: JPMORGAN CHASE BANK, N.A.
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 033686/0092 →
SECURITY AGREEMENT Recorded Sep 10, 2007
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 019795/0808 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 2, 2007
From: YODER, JAY A.; FAUTY, JOSEPH K.; LETTERMAN, JAMES P.
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, L.L.C.
Reel/Frame 018954/0421 →