Schottky diode structure with multi-portioned guard ring and method of manufacture
View Patent ↗In one embodiment, a semiconductor structure comprises a multi-portioned guard ring that includes a first portion and a second portion formed in a region of semiconductor material. A conductive contact layer forms a first Schottky barrier with the region of semiconductor material. The conductive contact layer overlaps the second portion and forms a second Schottky barrier that has an opposite polarity to the first Schottky barrier. The conductive contact layer does not overlap the first portion, which forms a pn junction with the region of semiconductor material.
1. A Schottky diode structure comprising:
a region of semiconductor material having a first major surface and a first conductivity type;
a doped region of a second conductivity type opposite the first conductivity type formed in the region of semiconductor material and extending from the first major surface, wherein the doped region comprises a first portion having a first dopant concentration in proximity to the first major surface and a second portion having a second dopant concentration in proximity to the first major surface, and wherein the second dopant concentration of the second portion is less than the first dopant concentration of the first portion, and wherein the first portion forms a first pn junction with a first part of the region of semiconductor material, and wherein the second portion forms a second pn junction with a second part of the region of semiconductor material;
a first conductive contact electrically coupled to a third part of the region of semiconductor material; and
a second conductive contact contacting the second portion at the first major surface but not the first portion, and wherein the second conductive contact forms a first Schottky barrier with a fourth part of the region of semiconductor material and a second Schottky barrier with the second portion, and wherein the first portion extends into the region of semiconductor material at a first vertical distance, and wherein the second conductive contact is offset from the first portion a lateral distance in a range from about 50% to about 80% of the first vertical distance.
2. The structure of claim 1 , wherein the lateral distance is about 75% of the first vertical distance.
3. The structure of claim 1 , wherein the first and second conductive contacts are on opposite surfaces of the region of semiconductor material.
4. The structure of claim 1 , wherein the first and second conductive contacts are on the first major surface.
5. The structure of claim 1 , wherein the first portion extends into the region of semiconductor material to define a first vertical boundary, and wherein the second portion extends into the region of semiconductor material to define a second vertical boundary.
6. The structure of claim 5 , wherein the first vertical boundary extends into the region of semiconductor material to a greater extent than the second vertical boundary.
7. The structure of claim 1 , wherein the region of semiconductor material comprises:
a semiconductor substrate; and
a semiconductor layer of the first conductivity type formed in spaced relationship with the semiconductor substrate.
8. The structure of claim 7 , wherein the semiconductor substrate comprises the second conductivity type.
9. The structure of claim 1 , wherein the first and second portions are contiguous.
10. A semiconductor device having a multi-portioned doped region comprising:
a region of semiconductor material having a first major surface and a first conductivity type;
a passivation layer formed overlying a first part of the region of semiconductor material, wherein the passivation layer includes a contact window with a first edge;
the multi-portioned doped region formed in a second part the region of semiconductor material and extending from the first major surface, wherein the multi-portioned doped region comprises a second conductivity type opposite to the first conductivity type, and wherein the multi-portioned doped region includes a first portion having a first dopant concentration in proximity to one portion of the first major surface and extending into the region of semiconductor material to a first vertical depth, a second portion having a second dopant concentration in proximity to a different portion of the first major surface and extending into the region of semiconductor material to a second vertical depth less than the first vertical depth, and a third portion laterally between the first and second portions, and wherein the third portion underlies the passivation layer a lateral distance from the first edge in a range from about 50% to about 80% of the first vertical depth, and wherein the second dopant concentration of the second portion is less than the first dopant concentration of the first portion, and wherein the first portion forms a first pn junction with the region of semiconductor material and the second portion forms a second pn junction with the region of semiconductor material; and
a conductive contact electrically coupled to a second part the region of semiconductor material, wherein the conductive contact further contacts at least a portion of the second portion at the major surface but not the first portion, and wherein the conductive contact forms a first Schottky barrier with the second part of the region of semiconductor material and a second Schottky barrier with the second portion.
11. The structure of claim 10 , wherein the conductive contact is self-aligned to the second portion.
12. The structure of claim 10 , wherein the first portion is contiguous with the third portion but not the second portion, and wherein the third portion is contiguous with the second portion.