IP Library Granted Patent US 7,888,921
Granted Patent B2
US 7,888,921 · App. 11/685,091 · Granted Feb 15, 2011

Switching power supply controller with high frequency current balance

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Quick Facts
Patent No.
US 7,888,921
App. No.
11/685,091
Granted
Feb 15, 2011
Kind
B2
Abstract

A controller for a multi-phase switching power supply shuffles the sequence of the phases in response to a load transient to prevent synchronization of one or more phases with high-frequency load transients. The sequence may be shuffled by varying the frequency and/or sequence of the switching control signals to introduce a random variation in the phases.

Claims (24)

1. A method of forming a power supply controller comprising:

configuring the power supply controller to form switching control signals for a multi-phase switching power supply;

configuring an oscillator to form a clock signal having a frequency that is used to control the switching control signals; and

shuffling the sequence of the switching control signals by increasing the frequency to an increased frequency in response to a load transient and maintaining the increased frequency during the load transient.

2. The method of claim 1 where shuffling the sequence comprises varying the sequence of the switching control signals.

3. The method of claim 1 where shuffling the sequence comprises introducing a random variation to the switching control signals.

4. The method of claim 1 where shuffling the sequence comprises varying the frequency of the oscillator.

5. The method of claim 1 where the load transient is detected based on an error signal which is generated by an error amplifier in response to an output of the switching power supply and a reference signal.

6. A switching power supply controller comprising:

a modulation circuit to generate switching control signals for a multi-phase switching power supply;

an oscillator having a frequency that is used to control a frequency of the switching control signals wherein the oscillator forms a clock signal having the frequency; and

circuitry to shuffle the sequence of the switching control signals by varying a sequence of the switching control signals relative to each other without changing the frequency in response to a load transient.

7. The controller of claim 6 where the circuitry to shuffle the sequence comprises circuitry coupled to the driver logic to vary the sequence of the switching control signals.

8. The controller of claim 7 further including randomizer circuitry to randomly blank the clock signal during a load release.

9. The controller of claim 6 where:

the controller further comprises an error amplifier to generate an error signal in response to an output of the switching power supply and a reference signal;

the oscillator including an input to set the frequency in response to a resistance coupled to the terminal; and

the multi-phase switching power supply further comprises a diode and a resistor coupled in series between an output of the error amplifier and the input of the oscillator.

10. The controller of claim 9 further comprising a second diode coupled in series with the diode and resistor.

11. The controller of claim 6 where the circuitry to shuffle the sequence of the switching control signals shuffles the sequence when an output of the switching power supply goes out of regulation.

12. The controller of claim 6 where the circuitry to shuffle the sequence of the switching control signals shuffles the sequence during a blanking period of the switching control signals.

13. The controller of claim 9 where the diode and resistor are arranged to vary the frequency of the oscillator during a load release.

14. The controller of claim 9 where the circuitry to shuffle the sequence comprises an analog comparator coupled to the error amplifier to receive the error signal.

15. The controller of claim 6 where the circuitry to shuffle the sequence comprises a digital algorithm to monitor the status of a load.

Assignments (8)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 038620, FRAME 0087 Recorded Jun 22, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064070/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT PATENT NUMBER 5859768 AND TO RECITE COLLATERAL AGENT ROLE OF RECEIVING PARTY IN THE SECURITY INTEREST PREVIOUSLY RECORDED ON REEL 038620 FRAME 0087. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Aug 25, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 039853/0001 →
RELEASE OF SECURITY INTEREST Recorded May 6, 2016
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT AND COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 038631/0345 →
RELEASE OF SECURITY INTEREST Recorded May 6, 2016
From: JPMORGAN CHASE BANK, N.A. (ON ITS BEHALF AND ON BEHALF OF ITS PREDECESSOR IN INTEREST, CHASE MANHATTAN BANK)
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 038632/0074 →
SECURITY INTEREST Recorded Apr 15, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH
Reel/Frame 038620/0087 →
SECURITY AGREEMENT Recorded Jan 19, 2010
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 023826/0725 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 19, 2008
From: TOBIN, DAVID A.; FENG, XIAOGANG; SCHIFF, TOD F.
To: ANALOG DEVICES, INC.
Reel/Frame 020524/0370 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 30, 2008
From: ANALOG DEVICES, INC.; ANALOG DEVICES B.V.
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 020431/0903 →