IP Library Granted Patent US 7,741,827
Granted Patent B2
US 7,741,827 · App. 11/743,066 · Granted Jun 22, 2010

Parameter control circuit including charging and discharging current mirrors and method therefor

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Quick Facts
Patent No.
US 7,741,827
App. No.
11/743,066
Granted
Jun 22, 2010
Kind
B2
Abstract

In one embodiment, a single input terminal of a parameter control circuit is utilized to form two different parameters of the parameter control circuit. In another embodiment, the parameter control circuit can include charging and discharging current mirrors.

Claims (29)

1. A parameter control circuit comprising:

a first input;

a first current mirror having an input path and a mirror path, the input path coupled to the first input;

a switch configured to enable or disable a first current through the mirror path of the first current mirror, wherein the first current mirror clamps the first input to a first voltage value responsively to the switch enabling the first current;

a capacitor coupled to receive the first current; and

a second current mirror having an input path and a mirror path wherein the input path is coupled to the first input, the second current mirror coupled to form a second current through the mirror path to discharge the capacitor responsively to the switch disabling the first current wherein the second current mirror is configured to form the second current with a second value that is different from a first value of the first current.

2. The circuit of claim 1 wherein the input path of the first current mirror is coupled to the first input to receive a first input current that is representative of the first current and wherein the input path of the second current mirror is coupled to the first input to receive a second input current, the second current mirror operably coupled to form the second current representative of the second input current.

3. The circuit of claim 2 wherein the second current mirror receives the second input current responsively to the switch disabling the first current.

4. The circuit of claim 2 wherein the switch disables the first input current from flowing through the input path of the first current mirror.

5. The circuit of claim 1 further including a second input configured to receive a control signal used to enable and disable the switch.

6. The circuit of claim 1 wherein the first input is configured to receive a signal from a resistor divider.

7. A method of forming a parameter control circuit comprising:

coupling a first circuit to a first input of the parameter control circuit;

configuring the first circuit to cause a first input current to flow through the first input and through a resistor divider and form a first current through the first circuit responsively to a control signal, wherein the first circuit clamps the first input to a first voltage value responsively to the first circuit causing the first input current to flow;

coupling the first circuit to use the first current to form one of a first time interval or a first voltage or a first current parameter;

coupling a second circuit to the first input;

configuring the second circuit to cause a second input current to flow through the first input and through the resistor divider and form a second current through the second circuit responsively to the control signal disabling the first current through the first circuit; and

coupling the second circuit to use the second current to form one of a second time interval or a second voltage or a second current parameter.

8. The method of claim 7 wherein coupling the first circuit to use the first current to form one of the first time interval or the first voltage or the first current parameter includes coupling the first circuit to charge a capacitor with the first current.

9. The method of claim 8 wherein coupling the second circuit to use the second current to form one of the second time interval or the second voltage or the second current parameter includes coupling the second circuit to discharge the capacitor with the second current.

10. The method of claim 7 wherein coupling the first and second circuits to the first input includes configuring the first and second circuits to be coupled to a single resistor divider.

11. The method of claim 10 wherein configuring the first and second circuits to be coupled to the single resistor divider includes configuring the first circuit to receive a first state of the control signal and responsively configure the single resistor divider to provide a first input current to the first circuit, and configuring the second circuit to configure the single resistor divider to provide a second input current to the second circuit responsively to a second state of the control signal.

12. A method of forming a parameter control circuit comprising:

configuring a switch to enable a first current control circuit to form a first input current through a first input of the parameter control circuit and through a resistor divider by clamping the first input to a first voltage value responsively to a control signal enabling the switch;

configuring the parameter control circuit to use the first input current to form one of a first time interval or a first voltage or a first current parameter;

configuring a second current control circuit to form a second input current through the first input and through the resistor divider responsively to the control signal causing the first current control circuit to disable the first input current; and

configuring the parameter control circuit to use the second input current to form one of a second time interval or a second voltage or a second current parameter.

13. The method of claim 12 wherein configuring the parameter control circuit to use the first input current includes coupling the parameter control circuit to charge a capacitor with the first input current.

14. The method of claim 13 wherein configuring the parameter control circuit to use the second input current includes coupling the parameter control circuit to discharge the capacitor with the second input current.

Assignments (6)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 038620, FRAME 0087 Recorded Jun 22, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064070/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT PATENT NUMBER 5859768 AND TO RECITE COLLATERAL AGENT ROLE OF RECEIVING PARTY IN THE SECURITY INTEREST PREVIOUSLY RECORDED ON REEL 038620 FRAME 0087. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Aug 25, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 039853/0001 →
SECURITY INTEREST Recorded Apr 15, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH
Reel/Frame 038620/0087 →
RELEASE OF SECURITY INTEREST Recorded Sep 4, 2014
From: JPMORGAN CHASE BANK, N.A.
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 033686/0092 →
SECURITY AGREEMENT Recorded Sep 10, 2007
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 019795/0808 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 1, 2007
From: ALLINDER, TERRY; BARBEHENN, GEORGE H.
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, L.L.C.
Reel/Frame 019233/0741 →